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Gestión de la energía
Reguladores lineales y de baja salida (LDO)

LP2985-N

ACTIVO

Regulador de voltaje de baja caída de 150 mA, 16 V, con habilitación

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LP2985-N

ACTIVO
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Detalles del producto

Output options Fixed Output Iout (max) (A) 0.15 Vin (max) (V) 16 Vin (min) (V) 2.2 Vout (max) (V) 6.1 Vout (min) (V) 1.8 Fixed output options (V) 2.5, 2.6, 2.7, 2.8, 2.9, 3, 3.1, 3.2, 3.3, 3.5, 3.6, 3.8, 4, 4.5, 5, 5.7, 6.1 Noise (µVrms) 30 Iq (typ) (mA) 0.065 Thermal resistance θJA (°C/W) 169 Rating Catalog Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Features Enable Accuracy (%) 2 PSRR at 100 KHz (dB) 30 Dropout voltage (Vdo) (typ) (mV) 280 Operating temperature range (°C) -40 to 125
Output options Fixed Output Iout (max) (A) 0.15 Vin (max) (V) 16 Vin (min) (V) 2.2 Vout (max) (V) 6.1 Vout (min) (V) 1.8 Fixed output options (V) 2.5, 2.6, 2.7, 2.8, 2.9, 3, 3.1, 3.2, 3.3, 3.5, 3.6, 3.8, 4, 4.5, 5, 5.7, 6.1 Noise (µVrms) 30 Iq (typ) (mA) 0.065 Thermal resistance θJA (°C/W) 169 Rating Catalog Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Features Enable Accuracy (%) 2 PSRR at 100 KHz (dB) 30 Dropout voltage (Vdo) (typ) (mV) 280 Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • V IN range: 2.5 V to 16 V
  • V OUT range (new chip):
    • 1.2 V to 5.0 V (fixed, 100-mV steps)
  • V OUT range (legacy chip): 2.5 V to 6.1 V
  • V OUT accuracy:
    • ±1% for A-grade legacy chip
    • ±1.5% for standard-grade legacy chip
    • ±0.5% for new chip only
  • Output accuracy over load, and temperature:
    • ±1% for new chip
  • Output current: Up to 150 mA
  • Low I Q (new chip): 71 µA at I LOAD = 0 mA
  • Low I Q (new chip): 750 µA at I LOAD = 150 mA
  • Shutdown current:
    • 0.05 µA (typ) for legacy chip
    • 1.12 µA (typ) for new chip
  • Low noise: 30 µV RMS with 10-nF bypass capacitor
  • Output current limiting and thermal protection
  • Stable with 2.2-µF ceramic capacitors
  • High PSRR: 70 dB at 1 kHz, 40 dB at 1 MHz
  • Operating junction temperature: –40°C to +125°C
  • Package: 5-pin SOT-23 (DBV) ultra-low dropout voltage
  • V IN range: 2.5 V to 16 V
  • V OUT range (new chip):
    • 1.2 V to 5.0 V (fixed, 100-mV steps)
  • V OUT range (legacy chip): 2.5 V to 6.1 V
  • V OUT accuracy:
    • ±1% for A-grade legacy chip
    • ±1.5% for standard-grade legacy chip
    • ±0.5% for new chip only
  • Output accuracy over load, and temperature:
    • ±1% for new chip
  • Output current: Up to 150 mA
  • Low I Q (new chip): 71 µA at I LOAD = 0 mA
  • Low I Q (new chip): 750 µA at I LOAD = 150 mA
  • Shutdown current:
    • 0.05 µA (typ) for legacy chip
    • 1.12 µA (typ) for new chip
  • Low noise: 30 µV RMS with 10-nF bypass capacitor
  • Output current limiting and thermal protection
  • Stable with 2.2-µF ceramic capacitors
  • High PSRR: 70 dB at 1 kHz, 40 dB at 1 MHz
  • Operating junction temperature: –40°C to +125°C
  • Package: 5-pin SOT-23 (DBV) ultra-low dropout voltage

The LP2985-N is a fixed-output, wide-input, low-noise, low-dropout voltage regulator supporting an input voltage range from 2.5 V to 16 V and up to 150 mA of load current. The LP2985-N supports an output range of 1.2 V to 5.0 V (new chip) and 2.5 V to 6.1 V (legacy chip).

Additionally, the LP2985-N (new chip) has a 1% output accuracy across load and temperature that can meet the needs of low-voltage microcontrollers (MCUs) and processors.

Low output noise of 30 µV RMS (with 10-nF bypass capacitors) and wide bandwidth PSRR performance of greater than 70 dB at 1 kHz and 40 dB at 1 MHz help attenuate the switching frequency of an upstream DC/DC converter and minimize post regulator filtering.

The internal soft-start time and current-limit protection reduce inrush current during start up, thus minimizing input capacitance. Standard protection features, such as overcurrent and overtemperature protection, are included.

The LP2985-N is available in a 5-pin, 2.9-mm × 1.6-mm SOT-23 (DBV) package.

The LP2985-N is a fixed-output, wide-input, low-noise, low-dropout voltage regulator supporting an input voltage range from 2.5 V to 16 V and up to 150 mA of load current. The LP2985-N supports an output range of 1.2 V to 5.0 V (new chip) and 2.5 V to 6.1 V (legacy chip).

Additionally, the LP2985-N (new chip) has a 1% output accuracy across load and temperature that can meet the needs of low-voltage microcontrollers (MCUs) and processors.

Low output noise of 30 µV RMS (with 10-nF bypass capacitors) and wide bandwidth PSRR performance of greater than 70 dB at 1 kHz and 40 dB at 1 MHz help attenuate the switching frequency of an upstream DC/DC converter and minimize post regulator filtering.

The internal soft-start time and current-limit protection reduce inrush current during start up, thus minimizing input capacitance. Standard protection features, such as overcurrent and overtemperature protection, are included.

The LP2985-N is available in a 5-pin, 2.9-mm × 1.6-mm SOT-23 (DBV) package.
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Documentación técnica

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* Data sheet LP2985-N 150-mA, Low-Noise, Low-Power, Ultra-Low-Dropout Regulator in a SOT-23 Package datasheet (Rev. AA) PDF | HTML 14 jul 2023
Application note A Topical Index of TI LDO Application Notes (Rev. F) 27 jun 2019
Technical article Trends in building automation: connected sensors for user comfort PDF | HTML 02 sep 2016
Application note AN-1148 Linear Regulators: Theory of Operation and Compensation (Rev. B) 06 may 2013
User guide AN-1840 USB I 2 C Interface Board Reference Manual (Rev. A) 30 abr 2013
Application note AN-1172 LP2980, LP2981, LP2982, LP2985 Micro SMD Demo Boards (Rev. B) 25 abr 2013
White paper Engineers note: Capacitors are key to voltage regulator design 01 jul 2002

Diseño y desarrollo

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No disponible en TI.com
Modelo de simulación

LP2985_N_2P5 PSpice Transient Model

SNVM632.ZIP (40 KB) - PSpice Model
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Modelo de simulación

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Modelo de simulación

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SOT-23 (DBV) 5 Ver opciones
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  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
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  • Monitoreo continuo de confiabilidad
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