MSP430F5237

ACTIVO

MCU de 25 MHz con 64 KB Flash, 8 KB SRAM, comparador, DMA, UART/SPI/I2C, temporizador, multiplicador

Detalles del producto

CPU MSP430 Frequency (MHz) 25 Flash memory (kByte) 64 RAM (kByte) 8 ADC type Slope Features Real-time clock UART 2 Number of ADC channels 0 SPI 4 USB No Hardware accelerators 0 Operating temperature range (°C) -40 to 85 Rating Catalog Communication interface I2C, SPI, UART Operating system BareMetal (No OS), TI RTOS Nonvolatile memory (kByte) 64 Number of GPIOs 53 Number of I2Cs 2 Security Secure debug
CPU MSP430 Frequency (MHz) 25 Flash memory (kByte) 64 RAM (kByte) 8 ADC type Slope Features Real-time clock UART 2 Number of ADC channels 0 SPI 4 USB No Hardware accelerators 0 Operating temperature range (°C) -40 to 85 Rating Catalog Communication interface I2C, SPI, UART Operating system BareMetal (No OS), TI RTOS Nonvolatile memory (kByte) 64 Number of GPIOs 53 Number of I2Cs 2 Security Secure debug
VQFN (RGC) 64 81 mm² 9 x 9
  • Low supply-voltage range: 3.6 V down to 1.8 V
  • Ultra-low power consumption
    • Active mode (AM): all system clocks active 290 µA/MHz at 8 MHz, 3.0 V, flash program execution (typical) 150 µA/MHz at 8 MHz, 3.0 V, RAM program execution (typical)
    • Standby mode (LPM3): real-time clock (RTC) with crystal, watchdog, and supply supervisor operational, full RAM retention, fast wakeup: 1.9 µA at 2.2 V, 2.1 µA at 3.0 V (typical) low-power oscillator (VLO), general-purpose counter, watchdog, and supply supervisor operational, full RAM retention, fast wakeup: 1.4 µA at 3.0 V (typical)
    • Off mode (LPM4): full RAM retention, supply supervisor operational, fast wakeup: 1.1 µA at 3.0 V (typical)
    • Shutdown mode (LPM4.5): 0.18 µA at 3.0 V (Typical)
  • Wake up from standby mode in 3.5 µs (typical)
  • 16-bit RISC architecture, extended memory, up to 25-MHz system clock
  • Flexible power-management system
    • Fully integrated LDO with programmable regulated core supply voltage
    • Supply voltage supervision, monitoring, and brownout
  • Unified clock system
    • FLL control loop for frequency stabilization
    • Low-power low-frequency internal clock source (VLO)
    • Low-frequency trimmed internal reference source (REFO)
    • 32-kHz watch crystals (XT1)
    • High-frequency crystals up to 32 MHz (XT2)
  • 16-bit timer TA0, Timer_A with five capture/compare registers
  • 16-bit timer TA1, Timer_A with three capture/compare registers
  • 16-bit timer TA2, Timer_A with three capture/compare registers
  • 16-bit timer TB0, Timer_B with seven capture/compare shadow registers
  • Two universal serial communication interfaces (USCIs)
    • USCI_A0 and USCI_A1 each support:
      • Enhanced UART with automatic baud-rate detection
      • IrDA encoder and decoder
      • Synchronous SPI
    • USCI_B0 and USCI_B1 each support:
      • I2C
      • Synchronous SPI
  • 10-bit analog-to-digital converter (ADC) with internal reference, sample-and-hold
  • Comparator
  • Hardware multiplier supports 32-bit operations
  • Serial onboard programming, no external programming voltage needed
  • 3-channel internal DMA
  • Basic timer with RTC feature
  • Device Comparison summarizes the family members
  • Low supply-voltage range: 3.6 V down to 1.8 V
  • Ultra-low power consumption
    • Active mode (AM): all system clocks active 290 µA/MHz at 8 MHz, 3.0 V, flash program execution (typical) 150 µA/MHz at 8 MHz, 3.0 V, RAM program execution (typical)
    • Standby mode (LPM3): real-time clock (RTC) with crystal, watchdog, and supply supervisor operational, full RAM retention, fast wakeup: 1.9 µA at 2.2 V, 2.1 µA at 3.0 V (typical) low-power oscillator (VLO), general-purpose counter, watchdog, and supply supervisor operational, full RAM retention, fast wakeup: 1.4 µA at 3.0 V (typical)
    • Off mode (LPM4): full RAM retention, supply supervisor operational, fast wakeup: 1.1 µA at 3.0 V (typical)
    • Shutdown mode (LPM4.5): 0.18 µA at 3.0 V (Typical)
  • Wake up from standby mode in 3.5 µs (typical)
  • 16-bit RISC architecture, extended memory, up to 25-MHz system clock
  • Flexible power-management system
    • Fully integrated LDO with programmable regulated core supply voltage
    • Supply voltage supervision, monitoring, and brownout
  • Unified clock system
    • FLL control loop for frequency stabilization
    • Low-power low-frequency internal clock source (VLO)
    • Low-frequency trimmed internal reference source (REFO)
    • 32-kHz watch crystals (XT1)
    • High-frequency crystals up to 32 MHz (XT2)
  • 16-bit timer TA0, Timer_A with five capture/compare registers
  • 16-bit timer TA1, Timer_A with three capture/compare registers
  • 16-bit timer TA2, Timer_A with three capture/compare registers
  • 16-bit timer TB0, Timer_B with seven capture/compare shadow registers
  • Two universal serial communication interfaces (USCIs)
    • USCI_A0 and USCI_A1 each support:
      • Enhanced UART with automatic baud-rate detection
      • IrDA encoder and decoder
      • Synchronous SPI
    • USCI_B0 and USCI_B1 each support:
      • I2C
      • Synchronous SPI
  • 10-bit analog-to-digital converter (ADC) with internal reference, sample-and-hold
  • Comparator
  • Hardware multiplier supports 32-bit operations
  • Serial onboard programming, no external programming voltage needed
  • 3-channel internal DMA
  • Basic timer with RTC feature
  • Device Comparison summarizes the family members

The TI MSP family of ultra-low-power microcontrollers consists of several devices featuring different sets of peripherals targeted for various applications. The architecture, combined with extensive low-power modes, is optimized to achieve extended battery life in portable measurement applications. The device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency. The digitally controlled oscillator (DCO) allows the device to wake up from low-power modes to active mode in 3.5 µs (typical).

The MSP430F524x series are microcontroller configurations with four 16-bit timers, a high-performance 10-bit ADC, two USCIs, a hardware multiplier, DMA, a comparator, and an RTC module with alarm capabilities.

The MSP430F523x series microcontrollers include all of the peripherals of the MSP430F524x series except for the ADC.

For complete module descriptions, see the MSP430F5xx and MSP430F6xx Family User’s Guide .

The TI MSP family of ultra-low-power microcontrollers consists of several devices featuring different sets of peripherals targeted for various applications. The architecture, combined with extensive low-power modes, is optimized to achieve extended battery life in portable measurement applications. The device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency. The digitally controlled oscillator (DCO) allows the device to wake up from low-power modes to active mode in 3.5 µs (typical).

The MSP430F524x series are microcontroller configurations with four 16-bit timers, a high-performance 10-bit ADC, two USCIs, a hardware multiplier, DMA, a comparator, and an RTC module with alarm capabilities.

The MSP430F523x series microcontrollers include all of the peripherals of the MSP430F524x series except for the ADC.

For complete module descriptions, see the MSP430F5xx and MSP430F6xx Family User’s Guide .

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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Fecha
* Data sheet MSP430F524x, MSP430F523x Mixed-Signal Microcontrollers datasheet (Rev. C) 20 oct 2020
* Errata MSP430F5237 Device Erratasheet (Rev. T) PDF | HTML 03 jun 2021
* User guide MSP430x5xx and MSP430x6xx Family User's Guide (Rev. Q) 17 ago 2018
Application note Migration Guide From MSP430 MCUs to MSPM0 MCUs (Rev. B) PDF | HTML 02 jun 2025
Application note Design Considerations When Using the MSP430 Graphics Library (Rev. A) PDF | HTML 09 ago 2023
Application note Li-Ion Battery Charger Solution Using an MSP430™ MCU (Rev. B) PDF | HTML 01 abr 2022
Application note ESD Diode Current Specification (Rev. B) PDF | HTML 23 ago 2021
Application note MSP430 System-Level ESD Considerations (Rev. B) PDF | HTML 14 jul 2021
User guide MSP430 MCUs Development Guide Book (Rev. A) PDF | HTML 13 may 2021
User guide SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. V) 01 jun 2020
Application note MSP430 System ESD Troubleshooting Guide PDF | HTML 13 dic 2019
Application note Interfacing the 3-V MSP430 MCU to 5-V Circuits (Rev. A) PDF | HTML 03 oct 2018
Application note MSP430F5xx Overview and Comparison to MSP430F2xx and MSP430F4xx (Rev. A) PDF | HTML 26 sep 2018
Application note Implementing An Ultra-Low-Power Keypad Interface With MSP430 MCUs (Rev. A) 22 may 2018
Application note MSP430 32-kHz Crystal Oscillators (Rev. D) PDF | HTML 18 jul 2017
White paper Capacitive Touch and MSP Microcontrollers (Rev. A) 27 abr 2017
Functional safety information Safety Manual for MSP430G2xx, F5xx, and FR57xx in IEC 60730 Safety Applications (Rev. A) 12 ene 2016
Application note MSP Code Protection Features PDF | HTML 07 dic 2015
White paper Industrial Communications Solutions Featuring MSP Microcontrollers 26 ene 2015
Application note Digital Addressable Lighting Interface (DALI) Using MSP430 Value Line (Rev. A) 18 oct 2012
Application note Design Considerations When Using the MSP430 Graphics Library 05 oct 2012
Application note Heart-Rate Monitor with Micrium uC/OS-II Kernel on the MSP430F5438A Experimenter 05 jul 2012
White paper Power Management Solutions for Ultra-Low-Power 16-Bit MSP430 MCUs (Rev. D) 28 mar 2012
Application note Nine-Axis Sensor Fusion Using Direction Cosine Matrix Algorithm on MSP430F5xx (Rev. A) 13 feb 2012
Application note 1.8V – 5.5V Input, High-Efficiency DCDC Converter Reference Design for MSP430 (Rev. B) 14 jun 2010

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
VQFN (RGC) 64 Ultra Librarian

Pedidos y calidad

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  • Acabado de plomo/material de la bola
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  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
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  • Monitoreo continuo de confiabilidad
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