TXG4020

ACTIVO

±40 V, convertidores de nivel a tierra de dirección fija de 2 bits, configuración 2/0

Detalles del producto

Rating Catalog Ground offset voltage (max) (V) 40 Bits (#) 2 Topology Push-Pull Applications GPIO Forward/reverse channels 2 forward / 0 reverse Isolation rating Functional Data rate (max) (Mbps) 250 Prop delay (ns) 5.9 CMTI (V/µs) 1000 Technology family TXG Vin (min) (V) 1.71 Vin (max) (V) 5.5 Vout (min) (V) 1.71 Vout (max) (V) 5.5 Current consumption per channel (1 Mbps) (typ) (mA) 3.3 Features Partial power down (Ioff)
Rating Catalog Ground offset voltage (max) (V) 40 Bits (#) 2 Topology Push-Pull Applications GPIO Forward/reverse channels 2 forward / 0 reverse Isolation rating Functional Data rate (max) (Mbps) 250 Prop delay (ns) 5.9 CMTI (V/µs) 1000 Technology family TXG Vin (min) (V) 1.71 Vin (max) (V) 5.5 Vout (min) (V) 1.71 Vout (max) (V) 5.5 Current consumption per channel (1 Mbps) (typ) (mA) 3.3 Features Partial power down (Ioff)
SOIC (D) 8 29.4 mm² 4.9 x 6 SOT-23-THN (DDF) 8 8.12 mm² 2.9 x 2.8
  • Supports DC shifts up to ±40V
  • AC Noise Rejection of 80VPP up to 5MHz
  • CMTI of 1kV/µs
  • Low Prop Delay (<5ns) and Ch-Ch Skew (<0.20ns)
  • Greater than 250Mbps
  • Low power consumption (0.8mA per channel at 1Mbps, 1.8V)
  • Fully configurable dual-rail design allows each port to operate from 1.71V to 5.5V
  • 4, 2, 1 channel devices with multiple configurations will be available
  • Two device variants:
    • TXG4020: 2 forward
    • TXG4021: 1 forward, 1 reverse
  • Supports VCC disconnect feature (I/Os are forced into high-Z)
  • Schmitt-trigger inputs allows for slow and noisy signals
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100mA per JESD 78, class II
    • ESD protection exceeds JESD 22
    • 2500V human-body model
    • 500V charged-device model
  • Package options provided:
    • DSG (WSON-8)
    • DDF (SOT-8)
    • D (SOIC-8)
  • Supports DC shifts up to ±40V
  • AC Noise Rejection of 80VPP up to 5MHz
  • CMTI of 1kV/µs
  • Low Prop Delay (<5ns) and Ch-Ch Skew (<0.20ns)
  • Greater than 250Mbps
  • Low power consumption (0.8mA per channel at 1Mbps, 1.8V)
  • Fully configurable dual-rail design allows each port to operate from 1.71V to 5.5V
  • 4, 2, 1 channel devices with multiple configurations will be available
  • Two device variants:
    • TXG4020: 2 forward
    • TXG4021: 1 forward, 1 reverse
  • Supports VCC disconnect feature (I/Os are forced into high-Z)
  • Schmitt-trigger inputs allows for slow and noisy signals
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100mA per JESD 78, class II
    • ESD protection exceeds JESD 22
    • 2500V human-body model
    • 500V charged-device model
  • Package options provided:
    • DSG (WSON-8)
    • DDF (SOT-8)
    • D (SOIC-8)

The TXG402x is a 2-bit, fixed direction, non-galvanic based voltage and ground-level translator that can support both logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±40V. Compared to traditional level shifters, the TXG402x family can solve the challenges of voltage translation across different ground levels. The Simplified Diagram shows a common use case where DC shift occurs between GNDA to GNDB due to parasitic resistance or capacitance.

VCCA is referenced to GNDA and VCCB is referenced to GNDB. Ax pins are referenced to VCCA logic level while Bx pins are referenced to VCCB logic levels. Both A port and B port can accept voltages from 1.71V to 5.5V. The leakage between GNDA and GNDB is <90nA when VCC to GND is shorted.

The TXG402x device helps improve noise immunity and power sequencing across different ground domains while providing low power consumption, latency and channel-to-channel skew. It can supress noise levels of 80VPP up to 5MHz (Figure 7-5). This device can support multiple interfaces such as UART, GPIO, and JTAG.

The TXG402x is a 2-bit, fixed direction, non-galvanic based voltage and ground-level translator that can support both logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±40V. Compared to traditional level shifters, the TXG402x family can solve the challenges of voltage translation across different ground levels. The Simplified Diagram shows a common use case where DC shift occurs between GNDA to GNDB due to parasitic resistance or capacitance.

VCCA is referenced to GNDA and VCCB is referenced to GNDB. Ax pins are referenced to VCCA logic level while Bx pins are referenced to VCCB logic levels. Both A port and B port can accept voltages from 1.71V to 5.5V. The leakage between GNDA and GNDB is <90nA when VCC to GND is shorted.

The TXG402x device helps improve noise immunity and power sequencing across different ground domains while providing low power consumption, latency and channel-to-channel skew. It can supress noise levels of 80VPP up to 5MHz (Figure 7-5). This device can support multiple interfaces such as UART, GPIO, and JTAG.

Descargar Ver vídeo con transcripción Video

Documentación técnica

star =Principal documentación para este producto seleccionada por TI
No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.
Ver todo 1
Tipo Título Fecha
* Data sheet TXG402x 2-bit , ± 40V Ground-Level Translator datasheet (Rev. A) PDF | HTML 25 jul 2025

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

14-24-LOGIC-EVM — Módulo de evaluación genérico de productos lógicos para encapsulados D, DB, DGV, DW, DYY, NS y PW de

El módulo de evaluación (EVM) 14-24-LOGIC-EVM está diseñado para admitir cualquier dispositivo lógico que se encuentre en un encapsulado D, DW, DB, NS, PW, DYY o DGV de 14 a 24 pines.

Guía del usuario: PDF | HTML
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOIC (D) 8 Ultra Librarian
SOT-23-THN (DDF) 8 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene preguntas sobre la calidad, el paquete o el pedido de productos de TI, consulte el soporte de TI. ​​​​​​​​​​​​​​

Videos