SN65LVDS180
- Meets or Exceeds the Requirements of ANSI
TIA/EIA-644-1995 Standard - Full-Duplex Signaling Rates up to 150 Mbps
- Bus-Pin ESD Exceeds 12 kV
- Operates From a Single 3.3-V Supply
- Low-Voltage Differential Signaling With Typical
Output Voltages of 350 mV and a 100-Ω Load - Propagation Delay Times
- Driver: 1.7 ns Typical
- Receiver: 3.7 ns Typical
- Power Dissipation at 200 MHz
- Driver: 25 mW Typical
- Receiver: 60 mW Typical
- LVTTL Input Levels Are 5-V Tolerant
- Receiver Maintains High Input Impedance With
VCC < 1.5 V - Receiver Has Open-Circuit Fail Safe
The SN65LVDS179, SN65LVDS180, SN65LVDS050, and SN65LVDS051 devices are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbps. The TIA/EIA-644 standard-compliant electrical interface provides a minimum differential output voltage magnitude of 247 mV into a 100-Ω load and receipt of 100-mV signals with up to 1 V of ground potential difference between a transmitter and receiver.
These devices offer various driver, receiver, and enabling combinations in industry-standard footprints. Because these devices are intended for use in simplex or distributed simplex bus structures, the driver enable function does not put the differential outputs into a high-impedance state but rather disconnects the input and reduces the quiescent power used by the device. For these functions with a high-impedance driver output, see the SN65LVDM series of devices. All devices are characterized for operation from –40°C to 85°C.
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技術資料
| 上位の文書 | タイプ | タイトル | フォーマットオプション | 最新の英語版をダウンロード | 日付 | |
|---|---|---|---|---|---|---|
| * | データシート | SN65LVDSxxx High-Speed Differential Line Drivers and Receivers データシート (Rev. R) | PDF | HTML | 2016/01/22 | ||
| アプリケーション概要 | LVDS to Improve EMC in Motor Drives | 2018/09/27 | ||||
| アプリケーション概要 | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | 2018/08/03 | ||||
| アプリケーション概要 | How to Terminate LVDS Connections with DC and AC Coupling | 2018/05/16 |
設計と開発
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| パッケージ | ピン数 | CAD シンボル、フットプリント、および 3D モデル |
|---|---|---|
| TSSOP (PW) | 14 | Ultra Librarian |
| SOIC (D) | 14 | Ultra Librarian |
購入と品質
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