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TMDS351

アクティブ

2.5 Gbps、3 入力 1 出力、DVI/HDMI 1.3a マルチプレクサ

製品詳細

Type Mux Protocols HDMI Rating Catalog Speed (max) (Gbpp) 2.5 Number of channels 3 Operating temperature range (°C) 0 to 70
Type Mux Protocols HDMI Rating Catalog Speed (max) (Gbpp) 2.5 Number of channels 3 Operating temperature range (°C) 0 to 70
TQFP (PAG) 64 144 mm² (12 mm × 12 mm)
  • Compatible with HDMI 1.3a
  • Supports 2.5 Gbps Signaling Rate for 480i/p, 720i/p,
    and 1080i/p Resolutions
    up to 12-Bit Color Depth
  • Integrated Receiver Termination
  • Selectable Receiver Equalization to Accommodate to
    Different Input Cable Lengths
  • Intra-Pair Skew < 40 ps
  • Inter-Pair Skew < 65 ps
  • HBM ESD Protection Exceeds 8 kV to TMDS Inputs
  • 3.3-V Fixed Supply to TMDS I/Os
  • 5-V Fixed Supply to HPD, DDC, and Source Selection Circuits
  • 64-Pin TQFP Package
  • ROHS Compatible and 260°C Reflow Rated
  • APPLICATIONS
    • Digital TV
    • Digital Projector

  • Compatible with HDMI 1.3a
  • Supports 2.5 Gbps Signaling Rate for 480i/p, 720i/p,
    and 1080i/p Resolutions
    up to 12-Bit Color Depth
  • Integrated Receiver Termination
  • Selectable Receiver Equalization to Accommodate to
    Different Input Cable Lengths
  • Intra-Pair Skew < 40 ps
  • Inter-Pair Skew < 65 ps
  • HBM ESD Protection Exceeds 8 kV to TMDS Inputs
  • 3.3-V Fixed Supply to TMDS I/Os
  • 5-V Fixed Supply to HPD, DDC, and Source Selection Circuits
  • 64-Pin TQFP Package
  • ROHS Compatible and 260°C Reflow Rated
  • APPLICATIONS
    • Digital TV
    • Digital Projector

The TMDS351 is a 3-port digital video interface (DVI) or high-definition multimedia interface (HDMI) switch that allows up to 3 DVI or HDMI ports to be switched to a single display terminal. Four TMDS channels, one hot plug detector, and a digital display control (DDC) interface are supported on each port. Each TMDS channel supports signaling rates up to 2.5 Gbps to allow 1080p resolution in 12-bit color depth.

When S1 is high and S2 is low, all input terminations are disconnected, TMDS inputs are high impedance with standard TMDS terminations, all internal MOSFETs are turned off to disable the DDC links, and all HPD outputs are connected to the HPD_SINK. This allows the initiation of the HDMI physical address discovery process.

Termination resistors (50-Ω), pulled up to VCC, are integrated at each TMDS receiver input. External terminations are not required. A precision resistor is connected externally from the VSADJ pin to ground for setting the differential output voltage to be compliant with the TMDS standard.

The TMDS351 provides two levels of receiver input equalization for different ranges of cable lengths. Each TMDS receiver owns frequency responsive equalization circuits. When EQ sets low, the receiver supports the input connection in short range HDMI cables. When EQ sets high, the receiver supports the input connection in long range HDMI cables. The TMDS351 supports power saving operation. When a system is under standby mode and there is no digital audio/visual content from a connected source, the 3.3-V supply voltage, VCC, can be powered off to minimize power consumption from the TMDS inputs, outputs, and internal switching circuits. The HPD, DDC, and source selection circuits are powered up by the 5-V supply voltage, VDD, to maintain the system hot plug detect response, the DDC link from the selected source to the sink under system standby operation. The device is characterized for operation from 0°C to 70°C.

The TMDS351 is a 3-port digital video interface (DVI) or high-definition multimedia interface (HDMI) switch that allows up to 3 DVI or HDMI ports to be switched to a single display terminal. Four TMDS channels, one hot plug detector, and a digital display control (DDC) interface are supported on each port. Each TMDS channel supports signaling rates up to 2.5 Gbps to allow 1080p resolution in 12-bit color depth.

When S1 is high and S2 is low, all input terminations are disconnected, TMDS inputs are high impedance with standard TMDS terminations, all internal MOSFETs are turned off to disable the DDC links, and all HPD outputs are connected to the HPD_SINK. This allows the initiation of the HDMI physical address discovery process.

Termination resistors (50-Ω), pulled up to VCC, are integrated at each TMDS receiver input. External terminations are not required. A precision resistor is connected externally from the VSADJ pin to ground for setting the differential output voltage to be compliant with the TMDS standard.

The TMDS351 provides two levels of receiver input equalization for different ranges of cable lengths. Each TMDS receiver owns frequency responsive equalization circuits. When EQ sets low, the receiver supports the input connection in short range HDMI cables. When EQ sets high, the receiver supports the input connection in long range HDMI cables. The TMDS351 supports power saving operation. When a system is under standby mode and there is no digital audio/visual content from a connected source, the 3.3-V supply voltage, VCC, can be powered off to minimize power consumption from the TMDS inputs, outputs, and internal switching circuits. The HPD, DDC, and source selection circuits are powered up by the 5-V supply voltage, VDD, to maintain the system hot plug detect response, the DDC link from the selected source to the sink under system standby operation. The device is characterized for operation from 0°C to 70°C.

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上位の文書 タイプ タイトル フォーマットオプション 最新の英語版をダウンロード 日付
* データシート 2.5 Gbps 3-to-1 DVI/HDMI Switch データシート (Rev. B) 2011/07/18

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パッケージ ピン数 CAD シンボル、フットプリント、および 3D モデル
TQFP (PAG) 64 Ultra Librarian

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