DS90C387A
- Supports SVGA through QXGA panel resolutions
- 32.5 to 112/170MHz clock support
- Drives long, low cost cables
- Up to 5.7 Gbps bandwidth
- Pre-emphasis reduces cable loading effects
- Dual pixel architecture supports interface to GUI and timing controller; optional single pixel transmitter inputs support single pixel GUI interface
- Transmitter rejects cycle-to-cycle jitter
- 5V tolerant on data and control input pins
- Programmable transmitter data and control strobe select (rising or falling edge strobe)
- Backward compatible with FPD-Link
- Compatible with ANSI/TIA/EIA-644-1995 LVDS Standard
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
The DS90C387A/DS90CF388A transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmitter converts 48 bits (Dual Pixel 24-bit color) of CMOS/TTL data and 3 control bits into 8 LVDS (Low Voltage Differential Signalling) data streams. At a maximum dual pixel rate of 112MHz, LVDS data line speed is 784Mbps, providing a total throughput of 5.7Gbps (714 Megabytes per second).
The LDI chipset is improved over prior generations of FPD-Link devices and offers higher bandwidth support and longer cable drive. To increase bandwidth, the maximum pixel clock rate is increased to 112 MHz and 8 serialized LVDS outputs are provided. Cable drive is enhanced with a user selectable pre-emphasis feature that provides additional output current during transitions to counteract cable loading effects.
The DS90C387A transmitter provides a second LVDS output clock. Both LVDS clocks are identical. This feature supports backward compatibility with the previous generation of FPD-Link Receivers - the second clock allows the transmitter to interface to panels using a 'dual pixel' configuration of two 24-bit or 18-bit FPD-Link receivers.
This chipset is an ideal means to solve EMI and cable size problems for high-resolution flat panel applications. It provides a reliable interface based on LVDS technology that delivers the bandwidth needed for high-resolution panels while maximizing bit times, and keeping clock rates low to reduce EMI and shielding requirements. For more details, please refer to the "Applications Information" section of this datasheet.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | DS90C387A/DS90CF388A Dual Pixel LVDS Display Interface / FPD-Link datasheet (Rev. D) | 2006. 2. 3 | ||
| 애플리케이션 노트 | High-Speed Layout Guidelines for Reducing EMI for LVDS SerDes Designs | 2018. 11. 9 | |||
| 애플리케이션 노트 | How to Map RGB Signals to LVDS/OpenLDI(OLDI) Displays (Rev. A) | 2018. 6. 29 | |||
| 애플리케이션 노트 | AN-1032 An Introduction to FPD-Link (Rev. C) | 2017. 8. 8 | |||
| 애플리케이션 노트 | TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color Map | 2004. 5. 15 | |||
| 애플리케이션 노트 | AN-1056 STN Application Using FPD-Link | 2004. 5. 14 | |||
| 애플리케이션 노트 | AN-1085 FPD-Link PCB and Interconnect Design-In Guidelines | 2004. 5. 14 | |||
| 애플리케이션 노트 | LVDS goes the distance! | 2003. 2. 17 |
설계 및 개발
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| QFP (NEZ) | 100 | Ultra Librarian |
주문 및 품질
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