OPA2822

활성

듀얼, 광대역 저잡음 SpeedPlus™ 연산 증폭기

제품 상세 정보

Architecture Voltage FB Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 12 GBW (typ) (MHz) 400 BW at Acl (MHz) 400 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 170 Vn at flatband (typ) (nV√Hz) 2 Vn at 1 kHz (typ) (nV√Hz) 2 Iq per channel (typ) (mA) 4.8 Vos (offset voltage at 25°C) (max) (mV) 1.2 Rail-to-rail No Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 110 Input bias current (max) (pA) 18000000 Offset drift (typ) (µV/°C) 5 Iout (typ) (mA) 150 2nd harmonic (dBc) 91 3rd harmonic (dBc) 100 Frequency of harmonic distortion measurement (MHz) 1
Architecture Voltage FB Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 12 GBW (typ) (MHz) 400 BW at Acl (MHz) 400 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 170 Vn at flatband (typ) (nV√Hz) 2 Vn at 1 kHz (typ) (nV√Hz) 2 Iq per channel (typ) (mA) 4.8 Vos (offset voltage at 25°C) (max) (mV) 1.2 Rail-to-rail No Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 110 Input bias current (max) (pA) 18000000 Offset drift (typ) (µV/°C) 5 Iout (typ) (mA) 150 2nd harmonic (dBc) 91 3rd harmonic (dBc) 100 Frequency of harmonic distortion measurement (MHz) 1
SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm) VSSOP (DGK) 8 14.7 mm² (3 mm × 4.9 mm)
  • LOW INPUT NOISE VOLTAGE: 2.0nV/Hz
  • HIGH UNITY GAIN BANDWIDTH: 500MHz
  • HIGH GAIN BANDWIDTH PRODUCT: 240MHz
  • HIGH OUTPUT CURRENT: 90mA
  • SINGLE +5V TO +12V OPERATION
  • LOW SUPPLY CURRENT: 4.8mA/ch
  • APPLICATIONS
    • xDSL DIFFERENTIAL LINE RECEIVERS
    • HIGH DYNAMIC RANGE ADC DRIVERS
    • LOW NOISE PLL INTEGRATORS
    • TRANSIMPEDANCE AMPLIFIERS
    • PRECISION BASEBAND I/Q AMPLIFIERS
    • ACTIVE FILTERS

All trademarks are the property of their respective owners.

  • LOW INPUT NOISE VOLTAGE: 2.0nV/Hz
  • HIGH UNITY GAIN BANDWIDTH: 500MHz
  • HIGH GAIN BANDWIDTH PRODUCT: 240MHz
  • HIGH OUTPUT CURRENT: 90mA
  • SINGLE +5V TO +12V OPERATION
  • LOW SUPPLY CURRENT: 4.8mA/ch
  • APPLICATIONS
    • xDSL DIFFERENTIAL LINE RECEIVERS
    • HIGH DYNAMIC RANGE ADC DRIVERS
    • LOW NOISE PLL INTEGRATORS
    • TRANSIMPEDANCE AMPLIFIERS
    • PRECISION BASEBAND I/Q AMPLIFIERS
    • ACTIVE FILTERS

All trademarks are the property of their respective owners.

The OPA2822 offers very low 2.0nV/Hz input noise in a wideband, unity gain stable, voltage-feedback architecture. Intended for xDSL receiver applications, the OPA2822 also supports this low input noise with exceptionally low harmonic distortion, particularly in differential configurations. Adequate output current is provided to drive the potentially heavy load of a passive filter between this amplifier and the codec. Harmonic distortion for a 2Vpp differential output operating from +5V to +12V supplies is ≤ –100dBc through 1MHz input frequencies. Operating on a low 4.8mA/ch supply current, the OPA2822 can satisfy all xDSL receiver requirements over a wide range of possible supply voltages—from a single +5V condition, to ±5V, on up to a single +12V design.

General-purpose applications on a single +5V supply will benefit from high input and output voltage swing available on this reduced supply voltage. Low-cost precision integrators for PLLs will also benefit from the low voltage noise and offset voltage. Baseband I/Q receiver channels can achieve almost perfect channel match with noise and distortion to support signals through 5MHz with > 14-bit dynamic range.

The OPA2822 offers very low 2.0nV/Hz input noise in a wideband, unity gain stable, voltage-feedback architecture. Intended for xDSL receiver applications, the OPA2822 also supports this low input noise with exceptionally low harmonic distortion, particularly in differential configurations. Adequate output current is provided to drive the potentially heavy load of a passive filter between this amplifier and the codec. Harmonic distortion for a 2Vpp differential output operating from +5V to +12V supplies is ≤ –100dBc through 1MHz input frequencies. Operating on a low 4.8mA/ch supply current, the OPA2822 can satisfy all xDSL receiver requirements over a wide range of possible supply voltages—from a single +5V condition, to ±5V, on up to a single +12V design.

General-purpose applications on a single +5V supply will benefit from high input and output voltage swing available on this reduced supply voltage. Low-cost precision integrators for PLLs will also benefit from the low voltage noise and offset voltage. Baseband I/Q receiver channels can achieve almost perfect channel match with noise and distortion to support signals through 5MHz with > 14-bit dynamic range.

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관심 가지실만한 유사 제품

open-in-new 대안 비교
다른 핀 출력을 지원하지만 비교 대상 장치와 동일한 기능.
LMH6628 활성 듀얼 광대역, 저잡음, 전압 피드백 연산 증폭기 Higher slew rate (550 V/us)

기술 자료

검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
9개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 Dual Wideband, Low-Noise Operational Amplifier datasheet (Rev. E) 2008. 8. 28
e북 The Signal e-book: A compendium of blog posts on op amp design topics PDF | HTML 2017. 3. 28
애플리케이션 노트 RLC Filter Design for ADC Interface Applications (Rev. A) 2015. 5. 13
사용 설명서 DEM-OPA-SO-2A User's Guide (Rev. B) 2010. 4. 30
애플리케이션 노트 Wireline Data Transmission and Reception 2010. 1. 27
사용 설명서 DEM-OPA-MSOP-2A User's Guide (Rev. A) 2006. 5. 25
애플리케이션 노트 Noise Analysis for High Speed Op Amps (Rev. A) 2005. 1. 17
애플리케이션 노트 ADS5500, OPA695: PC Board Layout for Low Distortion High-Speed ADC Drivers 2004. 4. 22
애플리케이션 노트 Measuring Board Parasitics in High-Speed Analog Design 2003. 7. 7

설계 및 개발

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평가 보드

DEM-OPA-MSOP-2A — MSOP-8 패키지용 듀얼 연산 증폭기 평가 모듈

The DEM-OPA-MSOP-2A demonstration fixture helps designers evaluate the operation and performance of TI's dual, high speed, wideband operational amplifiers. This unpopulated PC board is compatible with products offered in the 8-lead MSOP (DGK) package.
 
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평가 보드

DEM-OPA-SO-2A — SO-8 패키지용 듀얼 연산 증폭기 평가 모듈

The DEM-OPA-SO-2A demonstration evaluation module helps designers evaluate the operation and performance of TI dual-channel, high-speed, wideband operational amplifiers. This unpopulated printed-circuit board (PCB) is compatible with products offered in the 8-lead SOIC (D) package.

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시뮬레이션 모델

OPA2822 PSpice Model

SBOM157.ZIP (1 KB) - PSpice 모델
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계산 툴

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

아날로그 엔지니어의 계산기는 아날로그 회로 설계 엔지니어가 정기적으로 사용하는 많은 반복 계산의 속도를 높이도록 설계되었습니다. 이 PC 기반 툴은 피드백 저항을 사용한 연산 증폭기 게인 설정부터 아날로그-디지털 컨버터(ADC) 드라이브 버퍼 회로 안정화를 위한 적절한 회로 설계 요소 선택에 이르기까지 다양한 일반적인 계산 목록이 포함된 그래픽 인터페이스를 제공합니다.

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지원되는 제품 및 하드웨어
패키지 CAD 기호, 풋프린트 및 3D 모델
SOIC (D) 8 Ultra Librarian
VSSOP (DGK) 8 Ultra Librarian

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