홈 인터페이스 LVDS, M-LVDS 및 PECL IC
홈
인터페이스
LVDS, M-LVDS 및 PECL IC

SN65MLVD202A

활성

전이중 M-LVDS 트랜시버

지금 주문하기
데이터 시트

SN65MLVD202A

활성
데이터 시트 지금 주문하기

제품 상세 정보

Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Signaling rate (Mbps) 100 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Signaling rate (Mbps) 100 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm)
  • Low-Voltage Differential 30Ω to 55Ω Line Drivers and Receivers for Signaling Rates (1) up to 100Mbps, Clock Frequencies up to 50MHz
  • Type-1 Receivers Incorporate 25mV of Hysteresis (SN65MLVD200A, SN65MLVD202A)
  • Type-2 Receivers Provide an Offset (100mV) Threshold to Detect Open-Circuit and Idle-Bus Conditions (SN65MLVD204A, SN65MLVD205A)
  • Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint Data Interchange
  • Controlled Driver Output Voltage Transition Times for Improved Signal Quality
  • –1V to 3.4V of Common-Mode Voltage Range Allows Data Transfer With 2V of Ground Noise
  • Bus Pins High Impedance When Disabled or VCC ≤ 1.5V
  • 200Mbps Devices Available (SN65MLVD201, SN65MLVD203, SN65MLVD206, SN65MLVD207)
  • Bus Pin ESD Protection Exceeds 8kV
  • Packages Available:
    • 8-Pin SOIC SN65MLVD200A, SN65MLVD204A
    • 14-Pin SOIC SN65MLVD202A, SN65MLVD205A
  • Improved Alternatives to the SN65MLVD200, SN65MLVD202A, SN65MLVD204A, and SN65MLVD205A Devices

(1)The signaling rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second)
  • Low-Voltage Differential 30Ω to 55Ω Line Drivers and Receivers for Signaling Rates (1) up to 100Mbps, Clock Frequencies up to 50MHz
  • Type-1 Receivers Incorporate 25mV of Hysteresis (SN65MLVD200A, SN65MLVD202A)
  • Type-2 Receivers Provide an Offset (100mV) Threshold to Detect Open-Circuit and Idle-Bus Conditions (SN65MLVD204A, SN65MLVD205A)
  • Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint Data Interchange
  • Controlled Driver Output Voltage Transition Times for Improved Signal Quality
  • –1V to 3.4V of Common-Mode Voltage Range Allows Data Transfer With 2V of Ground Noise
  • Bus Pins High Impedance When Disabled or VCC ≤ 1.5V
  • 200Mbps Devices Available (SN65MLVD201, SN65MLVD203, SN65MLVD206, SN65MLVD207)
  • Bus Pin ESD Protection Exceeds 8kV
  • Packages Available:
    • 8-Pin SOIC SN65MLVD200A, SN65MLVD204A
    • 14-Pin SOIC SN65MLVD202A, SN65MLVD205A
  • Improved Alternatives to the SN65MLVD200, SN65MLVD202A, SN65MLVD204A, and SN65MLVD205A Devices

(1)The signaling rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second)

The SN65MLVD20xx devices are multipoint low-voltage differential (M-LVDS) line drivers and receivers that are optimized to operate at signaling rates up to 100 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899.

The SN65MLVD20xx devices have enhancements over their predecessors. Improved features include controlled slew rate on the driver output to help minimize reflections from unterminated stubs, which results in better signal integrity. Additionally, 8-kV ESD protection on the bus pins for more robustness. The same footprint definition was maintained making for an easy drop-in replacement for a system performance upgrade.

The devices are characterized for operation from –40°C to 85°C.

The SN65MLVD20xx devices are multipoint low-voltage differential (M-LVDS) line drivers and receivers that are optimized to operate at signaling rates up to 100 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899.

The SN65MLVD20xx devices have enhancements over their predecessors. Improved features include controlled slew rate on the driver output to help minimize reflections from unterminated stubs, which results in better signal integrity. Additionally, 8-kV ESD protection on the bus pins for more robustness. The same footprint definition was maintained making for an easy drop-in replacement for a system performance upgrade.

The devices are characterized for operation from –40°C to 85°C.
filter 기타 LVDS, M-LVDS 및 PECL IC 찾기
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관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능.
SN65MLVD203 활성 전이중 M-LVDS 트랜시버 Higher signaling rate (200Mbps)

기술 자료

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4개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 SN65MLVD20xx Multipoint-LVDS Line Driver and Receiver datasheet (Rev. E) PDF | HTML 2024. 3. 1
애플리케이션 노트 An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. C) PDF | HTML 2023. 6. 22
Application brief How Far, How Fast Can You Operate MLVDS? 2018. 8. 6
애플리케이션 노트 SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) 2001. 11. 20

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

MLVD20XBEVM — SN65MLVD203B 및 SN65MLVD204B 전이중 및 반이중 M-LVDS(멀티포인트 LVDS) 평가 모듈(EVM)

사용 설명서: PDF
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평가 보드

MLVD20XEVM — M-LVDS 평가 모듈

This evaluation module is for the SN65MLVD203B and SN65MLVD204B, which are M-LVDS transceivers.
The SN65MLVD203B is a full-duplex transceiver, and the SN65MLVD204B is a half-duplex transceiver.
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시뮬레이션 모델

SN65MLVD202A IBIS Model Version 2.2 (Rev. A)

SLLC185 (107 KB) - IBIS 모델
지원되는 제품 및 하드웨어
패키지 핀 CAD 기호, 풋프린트 및 3D 모델
SOIC (D) 14 Ultra Librarian
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