SN74CBT3125

Name: SN74CBT3125
Brand: TI
SKU: SN74CBT3125
Price: 0.216 USD

활성

st&ard '125유형 핀아웃이 있는 5V, 1:1(SPST), 4채널 범용 FET 버스 스위치

지금 주문

데이터시트

document-pdfAcrobat SN74CBT3125 datasheet (Rev. I) (영어)

SN74CBT3125

활성

데이터시트

지금 주문

제품 상세 정보

Configuration

1:1 SPST

Number of channels

Power supply voltage - single (V)

Protocols

Analog

Ron (typ) (Ω)

ON-state leakage current (max) (µA)

Bandwidth (MHz)

200

Operating temperature range (°C)

-40 to 85

Input/output continuous current (max) (mA)

128

Rating

Catalog

Drain supply voltage (max) (V)

5.5

Supply voltage (max) (V)

5.5

Configuration

1:1 SPST

Number of channels

Power supply voltage - single (V)

Protocols

Analog

Ron (typ) (Ω)

ON-state leakage current (max) (µA)

Bandwidth (MHz)

200

Operating temperature range (°C)

-40 to 85

Input/output continuous current (max) (mA)

128

Rating

Catalog

Drain supply voltage (max) (V)

5.5

Supply voltage (max) (V)

5.5

51.9 mm² 8.65 x 6

48.36 mm² 6.2 x 7.8

29.4 mm² 4.9 x 6

32 mm² 5 x 6.4

23.04 mm² 3.6 x 6.4

12.25 mm² 3.5 x 3.5

Standard ’125-Type Pinout (D, DB, DGV, and PW Packages)
5- Switch Connection Between Two Ports
TTL-Compatible Input Levels

Standard ’125-Type Pinout (D, DB, DGV, and PW Packages)
5- Switch Connection Between Two Ports
TTL-Compatible Input Levels

The SN74CBT3125 quadruple FET bus switch features independent line switches. Each switch is disabled when the associated output-enable (OE)\ input is high.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CBT3125 quadruple FET bus switch features independent line switches. Each switch is disabled when the associated output-enable (OE)\ input is high.

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기술 문서

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모두 보기26

	유형	직함		날짜
*	Data sheet	SN74CBT3125 datasheet (Rev. I)		2002/09/19
	Application note	Selecting the Correct Texas Instruments Signal Switch (Rev. E)	PDF \| HTML	2022/06/02
	Application note	Multiplexers and Signal Switches Glossary (Rev. B)	PDF \| HTML	2021/12/01
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)		2021/07/26
	Selection guide	Little Logic Guide 2018 (Rev. G)		2018/07/06
	Selection guide	Logic Guide (Rev. AB)		2017/06/12
	Application note	How to Select Little Logic (Rev. A)		2016/07/26
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		2015/12/02
	User guide	LOGIC Pocket Data Book (Rev. B)		2007/01/16
	More literature	Digital Bus Switch Selection Guide (Rev. A)		2004/11/10
	Product overview	Design Summary for WCSP Little Logic (Rev. B)		2004/11/04
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		2004/07/08
	Application note	Selecting the Right Level Translation Solution (Rev. A)		2004/06/22
	User guide	Signal Switch Data Book (Rev. A)		2003/11/14
	More literature	CBT RAID Application Clip		2003/06/12
	Application note	Bus FET Switch Solutions for Live Insertion Applications		2003/02/07
	Application note	Texas Instruments Little Logic Application Report		2002/11/01
	Application note	TI IBIS File Creation, Validation, and Distribution Processes		2002/08/29
	More literature	Standard Linear & Logic for PCs, Servers & Motherboards		2002/06/13
	Application note	16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)		2002/05/22
	Application note	Flexible Voltage-Level Translation With CBT Family Devices		1999/07/20
	User guide	CBT (5-V) And CBTLV (3.3-V) Bus Switches Data Book (Rev. B)		1998/12/01
	Application note	3.3-V to 2.5-V Translation with Texas Instruments Crossbar Technology (Rev. A)		1998/04/03
	Application note	Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices		1997/12/01
	Application note	5-V To 3.3-V Translation With the SN74CBTD3384 (Rev. B)		1997/03/01
	Application note	Understanding Advanced Bus-Interface Products Design Guide		1996/05/01

설계 및 개발

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인터페이스 어댑터

LEADED-ADAPTER1 — TI의 5, 8, 10, 16 및 24핀 리드 패키지의 빠른 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.

사용 설명서: PDF