TUSB1210-Q1

활성

오토모티브 USB2.0 고속 480Mbps ULPI PHY 트랜시버

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데이터 시트

document-pdfAcrobat TUSB1210-Q1 Standalone USB Transceiver Chip Silicon datasheet (Rev. A) (영어) PDF | HTML

TUSB1210-Q1

활성

데이터 시트

지금 주문하기

제품 상세 정보

Type

Transceiver

Function

USB2

USB speed (bps)

480000000

Alternate mode

No

Rating

Automotive

Operating temperature range (°C)

-40 to 85

Type

Transceiver

Function

USB2

USB speed (bps)

480000000

Alternate mode

No

Rating

Automotive

Operating temperature range (°C)

-40 to 85

VQFN (RHB)

32

25 mm² (5 mm × 5 mm)

AEC-Q100 Qualified with:
- Temperature Grade 3: –40°C to 85°C
- HBM ESD Classification 1C
- CDM ESD Classification C4B
USB2.0 PHY Transceiver Chip, Designed to Interface
with a USB Controller via a ULPI 12-pin Interface,
Fully Compliant With:
- Universal Serial Bus Specification Rev. 2.0
- On-The-Go Supplement to the USB
  2.0 Specification Rev. 1.3
- UTMI+ Low Pin Interface (ULPI) Specification
  Rev. 1.1
DP/DM Line External Component Compensation
(Patent #US7965100 B1)
Interfaces to Host, Peripheral and OTG Device Cores;
Optimized for Portable Devices or System ASICs with
Built-in USB OTG Device Core
Complete USB OTG Physical Front-End that Supports
Host Negotiation Protocol (HNP) and Session Request
Protocol (SRP)
ULPI Interface:
- I/O Interface (1.8 V) Optimized for Non-Terminated
  50 Ω Line Impedance
- ULPI CLOCK Pin (60 MHz) Supports Both Input
  and Output Clock Configurations
- Fully Programmable ULPI-Compliant Register Set
Available in a 32-Pin Quad Flat No Lead
[QFN (RHB)] Package

AEC-Q100 Qualified with:
- Temperature Grade 3: –40°C to 85°C
- HBM ESD Classification 1C
- CDM ESD Classification C4B
USB2.0 PHY Transceiver Chip, Designed to Interface
with a USB Controller via a ULPI 12-pin Interface,
Fully Compliant With:
- Universal Serial Bus Specification Rev. 2.0
- On-The-Go Supplement to the USB
  2.0 Specification Rev. 1.3
- UTMI+ Low Pin Interface (ULPI) Specification
  Rev. 1.1
DP/DM Line External Component Compensation
(Patent #US7965100 B1)
Interfaces to Host, Peripheral and OTG Device Cores;
Optimized for Portable Devices or System ASICs with
Built-in USB OTG Device Core
Complete USB OTG Physical Front-End that Supports
Host Negotiation Protocol (HNP) and Session Request
Protocol (SRP)
ULPI Interface:
- I/O Interface (1.8 V) Optimized for Non-Terminated
  50 Ω Line Impedance
- ULPI CLOCK Pin (60 MHz) Supports Both Input
  and Output Clock Configurations
- Fully Programmable ULPI-Compliant Register Set
Available in a 32-Pin Quad Flat No Lead
[QFN (RHB)] Package

The TUSB1210-Q1 is a USB2.0 transceiver chip, designed to interface with a USB controller via a ULPI interface. It supports all USB2.0 data rates (High-Speed 480 Mbps, Full-Speed 12 Mbps and Low-Speed 1.5 Mbps), and is compliant to both Host and Peripheral modes. It additionally supports a UART mode and legacy ULPI serial modes.

TUSB1210-Q1 also supports the OTG (Ver1.3) optional addendum to the USB 2.0 Specification, including Host Negotiation Protocol (HNP) and Session Request Protocol (SRP).

The DP/DM external component compensation in the transmitter compensates for variations in the series impendence in order to match with the data line impedance and the receiver input impedance, to limit data reflections, and thereby, improve eye diagrams.

The TUSB1210-Q1 is a USB2.0 transceiver chip, designed to interface with a USB controller via a ULPI interface. It supports all USB2.0 data rates (High-Speed 480 Mbps, Full-Speed 12 Mbps and Low-Speed 1.5 Mbps), and is compliant to both Host and Peripheral modes. It additionally supports a UART mode and legacy ULPI serial modes.

TUSB1210-Q1 also supports the OTG (Ver1.3) optional addendum to the USB 2.0 Specification, including Host Negotiation Protocol (HNP) and Session Request Protocol (SRP).

The DP/DM external component compensation in the transmitter compensates for variations in the series impendence in order to match with the data line impedance and the receiver input impedance, to limit data reflections, and thereby, improve eye diagrams.

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