ADC14155QML-SP

現行

Radiation-hardened, QML-V, 100krad, 14-bit single, 155MSPS ADC

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產品規格表

document-pdfAcrobat ADC14155QML-SP, radiation hardened, 14-Bit, 155-MSPS, 1.1-GHz bandwidth A/D converter datasheet (Rev. L) (英文) PDF | HTML

ADC14155QML-SP

現行

產品規格表

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產品詳細資料

Sample rate (max) (Msps)

155

Resolution (Bits)

14

Number of input channels

1

Interface type

Parallel CMOS

Analog input BW (MHz)

1100

Features

High Performance

Rating

Space

Peak-to-peak input voltage range (V)

2

Power consumption (typ) (mW)

967

Architecture

Pipeline

SNR (dB)

70.1

ENOB (Bits)

11.3

SFDR (dB)

82.3

Operating temperature range (°C)

-55 to 125

Input buffer

No

Radiation, TID (typ) (krad)

100

Radiation, SEL (MeV·cm2/mg)

120

Sample rate (max) (Msps)

155

Resolution (Bits)

14

Number of input channels

1

Interface type

Parallel CMOS

Analog input BW (MHz)

1100

Features

High Performance

Rating

Space

Peak-to-peak input voltage range (V)

2

Power consumption (typ) (mW)

967

Architecture

Pipeline

SNR (dB)

70.1

ENOB (Bits)

11.3

SFDR (dB)

82.3

Operating temperature range (°C)

-55 to 125

Input buffer

No

Radiation, TID (typ) (krad)

100

Radiation, SEL (MeV·cm2/mg)

120

CFP (NBA)

48

132.25 mm² (— mm × — mm)

5962R0626201VXC
- Total Ionizing Dose (TID) 100 krad(Si)
- Single Event Latch-up 120 MeV-cm²/mg
  (See Radiation Reports)
1.1-GHz Full-Power Bandwidth
Internal Sample-and-Hold Circuit
Low-Power Consumption
Internal Precision 1-V Reference
Single-Ended or Differential Clock Modes
Data Ready Output Clock
Clock Duty Cycle Stabilizer
Dual 3.3-V and 1.8-V Supply Operation (±10%)
Power-Down Mode
Offset Binary or 2’s Complement Output Data Format
48-pin CFP Package (11.5-mm × 11.5-mm, 0.635-mm Pin-Pitch)
Key Specifications
- Resolution 14 Bits
- Conversion Rate 155 MSPS
- SNR (f_IN = 70 MHz) 70.1 dBFS (typ)
- SFDR (f_IN = 70 MHz) 82.3 dBFS (typ)
- ENOB (f_IN = 70 MHz) 11.3 Bits (typ)
- Full-Power Bandwidth 1.1 GHz (typ)
- Power Consumption 967 mW (typ)

5962R0626201VXC
- Total Ionizing Dose (TID) 100 krad(Si)
- Single Event Latch-up 120 MeV-cm²/mg
  (See Radiation Reports)
1.1-GHz Full-Power Bandwidth
Internal Sample-and-Hold Circuit
Low-Power Consumption
Internal Precision 1-V Reference
Single-Ended or Differential Clock Modes
Data Ready Output Clock
Clock Duty Cycle Stabilizer
Dual 3.3-V and 1.8-V Supply Operation (±10%)
Power-Down Mode
Offset Binary or 2’s Complement Output Data Format
48-pin CFP Package (11.5-mm × 11.5-mm, 0.635-mm Pin-Pitch)
Key Specifications
- Resolution 14 Bits
- Conversion Rate 155 MSPS
- SNR (f_IN = 70 MHz) 70.1 dBFS (typ)
- SFDR (f_IN = 70 MHz) 82.3 dBFS (typ)
- ENOB (f_IN = 70 MHz) 11.3 Bits (typ)
- Full-Power Bandwidth 1.1 GHz (typ)
- Power Consumption 967 mW (typ)

The ADC14155QML-SP is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at rates up to 155 MSPS. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.1 GHz. The ADC14155 operates from dual 3.3-V and 1.8-V power supplies and consumes 967 mW of power at 155 MSPS.

The separate 1.8-V supply for the digital output interface allows lower power operation with reduced noise. A power-down feature reduces the power consumption to 5 mW with the clock input disabled, while still allowing fast wake-up time to full operation. The differential inputs provide a full scale differential input swing equal to 2 times the reference voltage. A stable 1-V internal voltage reference is provided, or the ADC14155 can be operated with an external reference. The Clock mode (differential versus single-ended) and output data format (offset binary versus 2’s complement) are pin-selectable. A duty cycle stabilizer maintains performance over a wide range of clock duty cycles.

The ADC14155QML-SP is available in a 48-lead thermally enhanced multi-layer ceramic quad package and operates over the military temperature range of –55°C to +125°C.

The ADC14155QML-SP is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at rates up to 155 MSPS. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.1 GHz. The ADC14155 operates from dual 3.3-V and 1.8-V power supplies and consumes 967 mW of power at 155 MSPS.

The separate 1.8-V supply for the digital output interface allows lower power operation with reduced noise. A power-down feature reduces the power consumption to 5 mW with the clock input disabled, while still allowing fast wake-up time to full operation. The differential inputs provide a full scale differential input swing equal to 2 times the reference voltage. A stable 1-V internal voltage reference is provided, or the ADC14155 can be operated with an external reference. The Clock mode (differential versus single-ended) and output data format (offset binary versus 2’s complement) are pin-selectable. A duty cycle stabilizer maintains performance over a wide range of clock duty cycles.

The ADC14155QML-SP is available in a 48-lead thermally enhanced multi-layer ceramic quad package and operates over the military temperature range of –55°C to +125°C.

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重要文件	類型	標題	格式選項	日期
*	資料表	ADC14155QML-SP, radiation hardened, 14-Bit, 155-MSPS, 1.1-GHz bandwidth A/D converter datasheet (Rev. L)	PDF \| HTML	2019/2/13
*	輻射及可靠性報告	ADC141555W-MLS, DAC121S101WGRQV, ADC08D1000WGFQV TID Report		2012/5/7
*	輻射及可靠性報告	ADC14155W-MLS TID Report		2012/5/7
*	輻射及可靠性報告	ADC14155W-MLS SEU Report		2012/5/7
*	輻射及可靠性報告	ADC14155W-MLS SEL Report		2012/5/7
*	輻射及可靠性報告	Analysis of Low Dose Rate Effects on Parasitic Bipolar Structures in CMOS Proces		2012/5/4
*	SMD	ADC14155QML-SP SMD 5962-06262		2018/5/29
	選擇指南	TI Space Products (Rev. L)		2026/3/27
	Application brief	DLA Approved Optimizations for QML Products (Rev. C)	PDF \| HTML	2025/6/17
	應用說明	Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. B)	PDF \| HTML	2025/6/10
	更多文件說明	TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. B)		2025/2/20
	應用說明	Single-Event Effects Confidence Interval Calculations (Rev. A)	PDF \| HTML	2022/10/19
	電子書	Radiation Handbook for Electronics (Rev. A)		2019/5/21
	應用說明	AN-1718 Differential Amplifier Applications Up to 400 MHz (Rev. B)		2013/5/1
	使用指南	ADC14155: 14-Bit, 155 MSPS Analog to Digital Converter User Guide		2012/2/21

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