ADC16V130
- Dual Supplies: 1.8V and 3.0V Operation
- On Chip Automatic Calibration During Power-Up
- Low Power Consumption
- Multi-Level Multi-Function Pins for CLK/DF and PD
- Power-Down and Sleep Modes
- On Chip Precision Reference and Sample-and-Hold Circuit
- On Chip Low Jitter Duty-Cycle Stabilizer
- Offset Binary or 2's Complement Data Format
- Full Data Rate LVDS Output Port
- 64-pin WQFN Package (9x9x0.8, 0.5mm Pin-Pitch)
Key Specifications
- High IF Sampling Receivers
- Multi-carrier Base Station Receivers
- GSM/EDGE, CDMA2000, UMTS, LTE, and WiMax
- Test and Measurement Equipment
- Communications Instrumentation
- Data Acquisition
- Portable Instrumentation
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The ADC16V130 is a monolithic high performance CMOS analog-to-digital converter capable of converting analog input signals into 16-bit digital words at rates up to 130 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and external component count while providing excellent dynamic performance. Automatic power-up calibration enables excellent dynamic performance and reduces part-to-part variation, and the ADC16V130 could be re-calibrated at any time by asserting and then de-asserting power-down. An integrated low noise and stable voltage reference and differential reference buffer amplifier easies board level design. On-chip duty cycle stabilizer with low additive jitter allows wide duty cycle range of input clock without compromising its dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.4 GHz. The digital data is provided via full data rate LVDS outputs – making possible the 64-pin, 9mm x 9mm WQFN package. The ADC16V130 operates on dual power supplies +1.8V and +3.0V with a power-down feature to reduce the power consumption to very low levels while allowing fast recovery to full operation.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | ADC16V130 16-Bit, 130 MSPS A/D Converter with LVDS Outputs datasheet (Rev. E) | 2013/3/15 | |||
| 應用說明 | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 2015/5/22 | ||||
| 使用指南 | ADC16V130 16-Bit, 130 MSPS AD Converter with LVDS Outputs Eval Bd User Guide (Rev. A) | 2013/7/26 | ||||
| 應用說明 | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 2013/7/19 | ||||
| 應用說明 | AN-2177 Using the LMH6554 as a ADC Driver (Rev. A) | 2013/4/26 | ||||
| 應用說明 | Drivng HSpeed ADCs w/LMH6521 DVGA for High IF AC-Coupled Apps (Rev. A) | 2013/4/26 | ||||
| 應用說明 | AN-1950 Silently Powering Low Noise Applications (Rev. A) | 2013/4/22 | ||||
| 使用指南 | SP16130CH4RB Low IF Receiver Reference Design User Guide | 2012/1/27 |
設計與開發
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WAVEVISION5 — WaveVision 5 Software
WaveVision 5 software is part of the WaveVision evaluation system that also includes WaveVision 5 Data Capture Board. The WaveVision 5 system is an easy-to-use data acquisition and analysis tool, designed to help users evaluate Texas Instruments' Signal Path solutions.
While WaveVision 5 software (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (NKD) | 64 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。