產品詳細資料

Sample rate (max) (Msps) 80 Resolution (Bits) 12 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 750 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2.3 Power consumption (typ) (mW) 660 Architecture Pipeline SNR (dB) 70.5 ENOB (Bits) 11.3 SFDR (dB) 87 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 80 Resolution (Bits) 12 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 750 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2.3 Power consumption (typ) (mW) 660 Architecture Pipeline SNR (dB) 70.5 ENOB (Bits) 11.3 SFDR (dB) 87 Operating temperature range (°C) -40 to 85 Input buffer No
HTQFP (PAP) 64 144 mm² 12 x 12
  • 12-Bit Resolution
  • 80 MSPS Sample Rate
  • High SNR: 69.7 dBFS at 100 MHz fIN
  • High SFDR: 83 dBc at 100 MHz fIN
  • 2.3-VPP Differential Input Voltage
  • Internal Voltage Reference
  • 3.3-V Single-Supply Voltage
  • Analog Power Dissipation: 541 mW
  • Serial Programming Interface
  • TQFP-64 PowerPAD™ Package
  • Recommended Op Amps:
    OPA695, OPA847, THS3201, THS3202, THS4503, THS4509, THS9001
  • APPLICATIONS
    • Wireless Communication
      • Communication Receivers
      • Base Station Infrastructure
    • Test and Measurement Instrumentation
    • Single and Multichannel Digital Receivers
    • Communication Instrumentation
      • Radar, Infrared
    • Video and Imaging
    • Medical Equipment

PowerPAD is a trademark of Texas Instruments.

  • 12-Bit Resolution
  • 80 MSPS Sample Rate
  • High SNR: 69.7 dBFS at 100 MHz fIN
  • High SFDR: 83 dBc at 100 MHz fIN
  • 2.3-VPP Differential Input Voltage
  • Internal Voltage Reference
  • 3.3-V Single-Supply Voltage
  • Analog Power Dissipation: 541 mW
  • Serial Programming Interface
  • TQFP-64 PowerPAD™ Package
  • Recommended Op Amps:
    OPA695, OPA847, THS3201, THS3202, THS4503, THS4509, THS9001
  • APPLICATIONS
    • Wireless Communication
      • Communication Receivers
      • Base Station Infrastructure
    • Test and Measurement Instrumentation
    • Single and Multichannel Digital Receivers
    • Communication Instrumentation
      • Radar, Infrared
    • Video and Imaging
    • Medical Equipment

PowerPAD is a trademark of Texas Instruments.

The ADS5522 is a high-performance, 12-bit, 80 MSPS analog-to-digital converter (ADC). To provide a complete converter solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal reference. Designed for applications demanding the highest speed and highest dynamic performance in little space, the ADS5522 has excellent power consumption of 541 mW at 3.3-V single-supply voltage. This allows an even higher system integration density. The provided internal reference simplifies system design requirements. Parallel CMOS-compatible output ensures seamless interfacing with common logic.

The ADS5522 is available in a 64-pin TQFP PowerPAD package over the industrial temperature range.

The ADS5522 is a high-performance, 12-bit, 80 MSPS analog-to-digital converter (ADC). To provide a complete converter solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal reference. Designed for applications demanding the highest speed and highest dynamic performance in little space, the ADS5522 has excellent power consumption of 541 mW at 3.3-V single-supply voltage. This allows an even higher system integration density. The provided internal reference simplifies system design requirements. Parallel CMOS-compatible output ensures seamless interfacing with common logic.

The ADS5522 is available in a 64-pin TQFP PowerPAD package over the industrial temperature range.

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技術文件

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重要文件 類型 標題 格式選項 日期
* Data sheet 12-Bit, 80MSPS Analog-to-Digital Converter datasheet (Rev. C) 2007年 2月 8日
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 2015年 5月 22日
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 2013年 7月 19日
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 2010年 9月 10日
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 2009年 4月 28日
Application note CDCE62005 as Clock Solution for High-Speed ADCs 2008年 9月 4日
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 2008年 6月 8日
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 2008年 6月 2日
User guide ADS5500/5541/5542/5520/5521/5522 14-&12-Bit Single Channel ADC w/LVDT1422 Output 2006年 7月 26日
Analog Design Journal Clocking High-Speed Data Converters 2005年 1月 18日

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支援軟體

HSADC-SPI-UTILITY ADS5400 EVM GUI

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模擬型號

ADS55xx IBIS Model (Rev. C)

SBAC028C.ZIP (343 KB) - IBIS Model
計算工具

ANALOG-ENGINEER-CALC PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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計算工具

JITTER-SNR-CALC Jitter and SNR calculator

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

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HTQFP (PAP) 64 Ultra Librarian

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