產品詳細資料

Resolution (Bits) 16 Sample rate (max) (ksps) 2500 Number of input channels 1 Interface type Enhanced SPI, SPI Architecture SAR Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 15 Analog supply voltage (min) (V) 1.65 Analog supply voltage (max) (V) 1.95 SNR (dB) 96 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
Resolution (Bits) 16 Sample rate (max) (ksps) 2500 Number of input channels 1 Interface type Enhanced SPI, SPI Architecture SAR Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 15 Analog supply voltage (min) (V) 1.65 Analog supply voltage (max) (V) 1.95 SNR (dB) 96 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
VQFN (RGE) 24 16 mm² 4 x 4
  • Sample Rate: 2.5 MSPS
  • No Latency Output
  • Excellent DC and AC Performance:
    • INL: ±0.25 LSB
    • DNL: ±0.6 LSB
    • SNR: 96 dB, THD: –118 dB
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5 V to 5 V,
      Independent of AVDD
  • Low-Power Dissipation:
    • 9 mW at 2.5 MSPS (AVDD Only)
    • 15.5 mW at 2.5 MSPS (Total)
    • Flexible Low-Power Modes Enable Power Scaling with Throughput
  • Enhanced-SPI (multiSPI™) Digital Interface
  • JESD8-7A-Compliant Digital I/O at 1.8-V DVDD
  • Fully-Specified Over Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN
  • Sample Rate: 2.5 MSPS
  • No Latency Output
  • Excellent DC and AC Performance:
    • INL: ±0.25 LSB
    • DNL: ±0.6 LSB
    • SNR: 96 dB, THD: –118 dB
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5 V to 5 V,
      Independent of AVDD
  • Low-Power Dissipation:
    • 9 mW at 2.5 MSPS (AVDD Only)
    • 15.5 mW at 2.5 MSPS (Total)
    • Flexible Low-Power Modes Enable Power Scaling with Throughput
  • Enhanced-SPI (multiSPI™) Digital Interface
  • JESD8-7A-Compliant Digital I/O at 1.8-V DVDD
  • Fully-Specified Over Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN

The ADS9120 is a 16-bit, 2.5-MSPS, successive approximation register (SAR) analog-to-digital converter (ADC) with enhanced performance features. The high throughput enables developers to oversample the input signal to improve dynamic range and accuracy of the measurement. The ADS9110 is a pin-compatible, 18-bit, 2-MSPS variant of the ADS9120.

The ADS9120 boosts analog performance while maintaining high-resolution data transfer by using TI’s enhanced SPI feature. Enhanced SPI enables the ADS9120 to achieve high throughput at lower clock speeds, thereby simplifying board layout and lowering system cost.

Enhanced SPI also simplifies the host clocking-in of data, thereby making the device ideal for applications involving FPGAs and DSPs. The ADS9120 is compatible with a standard SPI Interface. The ADS9120 has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The device supports JESD8-7A compliant I/Os, the extended industrial temperature range, and is offered in a space-saving, 4-mm × 4-mm, VQFN package.

The ADS9120 is a 16-bit, 2.5-MSPS, successive approximation register (SAR) analog-to-digital converter (ADC) with enhanced performance features. The high throughput enables developers to oversample the input signal to improve dynamic range and accuracy of the measurement. The ADS9110 is a pin-compatible, 18-bit, 2-MSPS variant of the ADS9120.

The ADS9120 boosts analog performance while maintaining high-resolution data transfer by using TI’s enhanced SPI feature. Enhanced SPI enables the ADS9120 to achieve high throughput at lower clock speeds, thereby simplifying board layout and lowering system cost.

Enhanced SPI also simplifies the host clocking-in of data, thereby making the device ideal for applications involving FPGAs and DSPs. The ADS9120 is compatible with a standard SPI Interface. The ADS9120 has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The device supports JESD8-7A compliant I/Os, the extended industrial temperature range, and is offered in a space-saving, 4-mm × 4-mm, VQFN package.

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重要文件 類型 標題 格式選項 日期
* Data sheet ADS9120 16-Bit, 2.5-MSPS, 15.5-mW, SAR ADC With Enhanced Performance Features datasheet (Rev. A) PDF | HTML 2017年 6月 29日
Application note Attenuator Amplifier Design to Maximize the Input Voltage of Differential ADCs 2018年 6月 14日
Application brief Improving Input Settling for Precision Data Converters 2017年 12月 12日
Application brief Optimizing Data Transfer on High-Resolution, High-Throughput Data Converters 2017年 12月 12日
Application brief Simplify Isolation Designs Using an Enhanced-SPI ADC Interface 2017年 12月 11日
White paper Enabling Faster, Smarter, and More Robust Solutions for SAR ADSx With multiSPI 2016年 11月 8日
White paper Voltage-reference impact on total harmonic distortion 2016年 8月 1日

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開發板

ADS9120EVM-PDK — ADS9120 16 位元 2.5 MSPS、15.5mW SAR ADC EVM 性能展示套件 (PDK)

ADS9120 評估模組 (EVM) 性能展示套件 (PDK) 是用於評估 ADS9120 連續近似暫存器類比轉數位轉換器 (SAR ADC) 效能的平台。ADS9120EVM-PDK 包含 ADS9120 EVM 板、PHI 控制器電路板,以及隨附的電腦軟體,可讓使用者透過通用序列匯流排 (USB) 與 ADC 通訊、擷取資料,以及執行資料分析。

使用指南: PDF
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開發模組 (EVM) 的 GUI

SBAC154 ADS9120EVM-PDK GUI

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模擬型號

ADS9120 IBIS Model

SBAM297.ZIP (12 KB) - IBIS Model
模擬型號

ADS9120 TINA-TI Reference Design

SBAM299.TSC (7032 KB) - TINA-TI Reference Design
模擬型號

ADS9120 TINA-TI Spice Model

SBAM298.TSM (48 KB) - TINA-TI Spice Model
模擬型號

Impedance Spectroscopy TINA-TI Reference Design (Differential)

SBOMBM0.TSC (94 KB) - TINA-TI Reference Design
計算工具

ANALOG-ENGINEER-CALC PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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設計工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中,您可以搜尋 TI (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RGE) 24 Ultra Librarian

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