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車用 MCU
汽車動力系統、區域和底盤控制 MCU

AM263P4-Q1

現行

具有即時控制及封裝內快閃記憶體的車用 400MHz 四核心 Arm® Cortex®-R5F MCU

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產品規格表
使用指南

AM263P4-Q1

現行
產品規格表 立即訂購

產品詳細資料

CPU Arm Cortex-R5F Frequency (MHz) 400 Flash memory (kByte) 8000 RAM (kByte) 3072 ADC type 5 12-bit SAR Total processing (MIPS) 0.0016 Features CAN, CAN FD, EnDat 2.2, Ethernet, External memory interface, Hardware encrpytion (AES/DES/SHA/MD5), OSPI, QSPI, SD/SDIO, SPI, UART UART 6 CAN (#) 8 (CAN-FD) PWM (Ch) 64 Security Cryptographic acceleration, Device lifecycle management, Secure boot, Secure debug, Secure provisioning Number of ADC channels 30 SPI 8 Operating temperature range (°C) -40 to 150 Rating Automotive Communication interface CAN, CAN-FD, OSPI, QSPI, SD/SDIO, SPI, UART Operating system AutoSAR, FreeRTOS, SafeRTOS, Zephyr RTOS Hardware accelerators Trigonometric math accelerator Number of GPIOs 140 Number of I2Cs 4
CPU Arm Cortex-R5F Frequency (MHz) 400 Flash memory (kByte) 8000 RAM (kByte) 3072 ADC type 5 12-bit SAR Total processing (MIPS) 0.0016 Features CAN, CAN FD, EnDat 2.2, Ethernet, External memory interface, Hardware encrpytion (AES/DES/SHA/MD5), OSPI, QSPI, SD/SDIO, SPI, UART UART 6 CAN (#) 8 (CAN-FD) PWM (Ch) 64 Security Cryptographic acceleration, Device lifecycle management, Secure boot, Secure debug, Secure provisioning Number of ADC channels 30 SPI 8 Operating temperature range (°C) -40 to 150 Rating Automotive Communication interface CAN, CAN-FD, OSPI, QSPI, SD/SDIO, SPI, UART Operating system AutoSAR, FreeRTOS, SafeRTOS, Zephyr RTOS Hardware accelerators Trigonometric math accelerator Number of GPIOs 140 Number of I2Cs 4
NFBGA (ZCZ) 324 225 mm² (15 mm × 15 mm)

Processor Cores:

  • Single, dual, and quad-core Arm Cortex-R5F MCU with each core running up to 400MHz
    • 16KB I-cache with 64-bit ECC per CPU core
    • 16KB D-cache with 32-bit ECC per CPU core
    • x256 integrated VIM per CPU Core
    • 256KB Tightly-Coupled Memory (TCM) with 32-bit ECC per CPU core cluster
    • Lockstep or Dual-core capable clusters
  • Trigonometric Math Unit (TMU) for accelerating trigonometric functions
    • Up to 4x, one per R5F MCU core

Memory:

  • 1x Flash Subsystem with OptiFlash memory technology and eXecute In Place (XIP) support
    • 1x Octal Serial Peripheral Interface (OSPI), up to 133MHz SDR and DDR
    • AM263P Flash-in-Package (ZCZ_F) variant includes 8MB OSPI Flash
  • 3MB of On-Chip RAM (OCSRAM)
    • 6 Banks x 512KB
    • ECC error protection
    • Internal DMA engine support
    • Remote L2 Cache for external memory, software programmable up to 128KB per CPU core

System on Chip (SoC) Services and Architecture:

  • 1x EDMA to support data movement functions
    • 2x Transfer Controllers (TPTC)
    • 1x Channel Controller (TPCC)
  • Device Boot supported from the following interfaces:
    • UART (Primary/Backup)
    • QSPI NOR Flash (4S/1S) (Primary)
    • OSPI NOR Flash (8S 50MHz SDR Mode0, 8S 25MHz DDR XSPI) (Primary)
  • Interprocessor communication modules
    • SPINLOCK module for synchronizing processes running on multiple cores
    • MAILBOX functionality implemented through CTRLMMR registers
  • Central Platform Time Sync (CPTS) support with time-sync and compare-event interrupt routers
  • Timer Modules:
    • 4x Windowed Watchdog Timer (WWDT)
    • 8x Real Time Interrupt (RTI) timer

General Connectivity:

  • 6x Universal Asynchronous RX-TX (UART)
  • 8x Serial Peripheral Interface (SPI) controllers
  • 5x Local Interconnect Network (LIN) ports
  • 4x Inter-Integrated Circuit (I2C) ports
  • 8x Modular Controller Area Network (MCAN) modules with CAN-FD support
  • 4x Fast Serial Interface Transmitters (FSITX)
  • 4x Fast Serial Interface Receivers (FSIRX)
  • Up to 139 General-Purpose I/O (GPIO) pins

Sensing & Actuation:

  • Real-time Control Subsystem (CONTROLSS)
  • Flexible Input/Output Crossbars (XBAR)
  • 5x 12-bit Analog-to-Digital Converters (ADC)
    • 6-input SAR ADC up to 4MSPS
      • 6x Single-ended channels OR
      • 3x Differential channels
    • Highly Configurable ADC Digital Logic
      • XBAR Start of Conversion Triggers (SOC)
      • User-defined Sample and Hold (S+H)
      • Flexible Post-processing Blocks (PPB)
  • 1x Resolver subsystem (ZCZ-S and ZCZ-F packages) with:
    • 2x Resolver to Digital Converter (RDC) OR
    • 2x 12-bit ADCs can also be used for general purpose
      • 4-input SAR ADC up to 3MSPS
        • 4x Single-ended channels OR
        • 2x Differential channels
  • 10x Analog Comparators with Type-A programmable DAC reference (CMPSSA)
  • 10x Analog Comparators with Type-B programmable DAC reference (CMPSSB)
  • 1x 12-bit Digital-to-Analog Converter (DAC)
  • 32x Pulse Width Modulation (EPWM) modules
    • Single or Dual PWM channels
    • Advanced PWM Configurations
    • Extended HRPWM time resolution
  • 16x Enhanced Capture (ECAP) modules
  • 3x Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2x 4-Ch Sigma-Delta Filter Modules (SDFM)
  • Additional Signal-multiplex Crossbars (XBAR)

Industrial Connectivity:

  • Programmable Real-Time Unit - Industrial Communication Subsystem (PRU-ICSS)
    • Dual core Programmable Real-Time Unit Subsystem (PRU0 / PRU1)
      • Deterministic Hardware
      • Dynamic Firmware
    • 20-channel enhanced input (eGPI) per PRU
    • 20-channel enhanced output (eGPO) per PRU
    • Embedded Peripherals and Memory
      • 1x UART, 1x ECAP, 1x MDIO, 1x IEP
      • 1x 32KB Shared General Purpose RAM
      • 2x 8KB Shared Data RAM
      • 1x 16KB IRAM per PRU
      • ScratchPad (SPAD), MAC/CRC
    • Digital encoder and sigma-delta control loops
    • The PRU-ICSS enables advanced industrial protocols including:
      • EtherCAT, Ethernet/IP™,
      • PROFINET, IO-Link for order
    • Dedicated Interrupt Controller (INTC)
    • Dynamic CONTROLSS XBAR Integration

High-Speed Interfaces:

  • Integrated 3-port Gigabit Ethernet switch (CPSW) supporting up to two external ports
    • MII (10/100), RMII (10/100), or RGMII (10/100/1000)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • 512x ALE engine-based Packet Classifiers
    • Priority flow control with up to 2KB packet size
    • Four CPU hardware interrupt pacing
    • IP/UDP/TCP checksum offload in hardware

Security:

  • Hardware Security Module (HSM) with support for Auto SHE 1.1/EVITA
    • Arm Cortex-M4F based dedicated security controller
    • Isolated and secured RAMs
    • Peripherals like Timers, WWDT, RTC, Interrupt Controller
    • Safety related peripherals like CRC, ESM, PBIST
  • Secure boot support
    • Device Take Over Protection
    • Hardware-enforced root-of-trust (RoT)
      • Support for two sets of RoT keys
    • Authenticated boot support
      • Encrypted boot support
    • SW Anti-rollback protection
  • Debug security
    • Secure device debug only after cryptographic authentication
    • Support for permanent debug/JTAG disable
  • Device ID and Key Management
    • Unique ID (SoC ID)
    • Support for OTP Memory (FUSEROM)
  • Extensive Firewall Support
    • System Memory Protection Units (MPU) present at various interfaces
  • Cryptographic Acceleration
    • Cryptographic cores with DMA Support
    • AES - 128/192/256-bit key sizes
    • SHA2 - 256/384/512-bit support
    • Deterministic random bit generator (DRBG) with pseudo and true random number generator (TRNG)
    • Public Key Accelerator (PKA) to assist in RSA/Elliptic Curve Cryptography (ECC) processing

Functional Safety:

  • Enables design of systems with functional safety requirements
    • Error Signaling Module (ESM) with designated SAFETY_ERRORn pin
    • ECC or parity on calculation-critical memories
    • 4x Dual Clock Comparators (DCC)
    • 3x Self-Test Controller (STC)
    • Programmable Built-In Self-Test (PBIST) and fault-injection for CPU and on-chip RAM
    • Runtime internal diagnostic modules including voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engines for memory integrity checks
  • Functional Safety-Compliant targeted [Industrial]
    • Developed for functional safety applications
    • Documentation to be made available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL-3 targeted
    • Hardware integrity up to SIL-3 targeted
    • Safety-related certification
      • IEC 61508 planned
  • Functional Safety-Compliant targeted [Automotive]
    • Developed for functional safety applications
    • Documentation to be made available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL-D targeted
    • Hardware integrity up to ASIL-D targeted
    • Safety-related certification
      • ISO 26262 planned

Data Storage

  • 1x 4-bit Multi-Media Card/Secure Digital (MMC/SD) interface

Power Management

  • Recommended TPS653860-Q1 Power Management ICs (PMIC)
    • Companion PMIC specially designed to meet device power supply requirements
    • Flexible mapping and factory programmed configurations to support different use cases

Technology / Package:

  • AEC-Q100 qualified for automotive applications
  • 45nm technology
  • ZCZ Package
    • AM263x Compatible (ZCZ-C)
      • Pin-to-Pin compatible option with AM263x
    • AM263Px Resolver (ZCZ-S)
      • Adds new Resolver Subsystem functionality
    • AM263Px Resolver with Flash-in-Package (ZCZ-F)
      • Includes 1x internally connected Silicon in Package (SIP) 64Mb ISSI IS25LX064-JWLA3 OSPI Flash device; up to 133MHz SDR and DDR
    • 324-pin NFBGA
    • 15.0mm x 15.0mm
    • 0.8mm pitch

Processor Cores:

  • Single, dual, and quad-core Arm Cortex-R5F MCU with each core running up to 400MHz
    • 16KB I-cache with 64-bit ECC per CPU core
    • 16KB D-cache with 32-bit ECC per CPU core
    • x256 integrated VIM per CPU Core
    • 256KB Tightly-Coupled Memory (TCM) with 32-bit ECC per CPU core cluster
    • Lockstep or Dual-core capable clusters
  • Trigonometric Math Unit (TMU) for accelerating trigonometric functions
    • Up to 4x, one per R5F MCU core

Memory:

  • 1x Flash Subsystem with OptiFlash memory technology and eXecute In Place (XIP) support
    • 1x Octal Serial Peripheral Interface (OSPI), up to 133MHz SDR and DDR
    • AM263P Flash-in-Package (ZCZ_F) variant includes 8MB OSPI Flash
  • 3MB of On-Chip RAM (OCSRAM)
    • 6 Banks x 512KB
    • ECC error protection
    • Internal DMA engine support
    • Remote L2 Cache for external memory, software programmable up to 128KB per CPU core

System on Chip (SoC) Services and Architecture:

  • 1x EDMA to support data movement functions
    • 2x Transfer Controllers (TPTC)
    • 1x Channel Controller (TPCC)
  • Device Boot supported from the following interfaces:
    • UART (Primary/Backup)
    • QSPI NOR Flash (4S/1S) (Primary)
    • OSPI NOR Flash (8S 50MHz SDR Mode0, 8S 25MHz DDR XSPI) (Primary)
  • Interprocessor communication modules
    • SPINLOCK module for synchronizing processes running on multiple cores
    • MAILBOX functionality implemented through CTRLMMR registers
  • Central Platform Time Sync (CPTS) support with time-sync and compare-event interrupt routers
  • Timer Modules:
    • 4x Windowed Watchdog Timer (WWDT)
    • 8x Real Time Interrupt (RTI) timer

General Connectivity:

  • 6x Universal Asynchronous RX-TX (UART)
  • 8x Serial Peripheral Interface (SPI) controllers
  • 5x Local Interconnect Network (LIN) ports
  • 4x Inter-Integrated Circuit (I2C) ports
  • 8x Modular Controller Area Network (MCAN) modules with CAN-FD support
  • 4x Fast Serial Interface Transmitters (FSITX)
  • 4x Fast Serial Interface Receivers (FSIRX)
  • Up to 139 General-Purpose I/O (GPIO) pins

Sensing & Actuation:

  • Real-time Control Subsystem (CONTROLSS)
  • Flexible Input/Output Crossbars (XBAR)
  • 5x 12-bit Analog-to-Digital Converters (ADC)
    • 6-input SAR ADC up to 4MSPS
      • 6x Single-ended channels OR
      • 3x Differential channels
    • Highly Configurable ADC Digital Logic
      • XBAR Start of Conversion Triggers (SOC)
      • User-defined Sample and Hold (S+H)
      • Flexible Post-processing Blocks (PPB)
  • 1x Resolver subsystem (ZCZ-S and ZCZ-F packages) with:
    • 2x Resolver to Digital Converter (RDC) OR
    • 2x 12-bit ADCs can also be used for general purpose
      • 4-input SAR ADC up to 3MSPS
        • 4x Single-ended channels OR
        • 2x Differential channels
  • 10x Analog Comparators with Type-A programmable DAC reference (CMPSSA)
  • 10x Analog Comparators with Type-B programmable DAC reference (CMPSSB)
  • 1x 12-bit Digital-to-Analog Converter (DAC)
  • 32x Pulse Width Modulation (EPWM) modules
    • Single or Dual PWM channels
    • Advanced PWM Configurations
    • Extended HRPWM time resolution
  • 16x Enhanced Capture (ECAP) modules
  • 3x Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2x 4-Ch Sigma-Delta Filter Modules (SDFM)
  • Additional Signal-multiplex Crossbars (XBAR)

Industrial Connectivity:

  • Programmable Real-Time Unit - Industrial Communication Subsystem (PRU-ICSS)
    • Dual core Programmable Real-Time Unit Subsystem (PRU0 / PRU1)
      • Deterministic Hardware
      • Dynamic Firmware
    • 20-channel enhanced input (eGPI) per PRU
    • 20-channel enhanced output (eGPO) per PRU
    • Embedded Peripherals and Memory
      • 1x UART, 1x ECAP, 1x MDIO, 1x IEP
      • 1x 32KB Shared General Purpose RAM
      • 2x 8KB Shared Data RAM
      • 1x 16KB IRAM per PRU
      • ScratchPad (SPAD), MAC/CRC
    • Digital encoder and sigma-delta control loops
    • The PRU-ICSS enables advanced industrial protocols including:
      • EtherCAT, Ethernet/IP™,
      • PROFINET, IO-Link for order
    • Dedicated Interrupt Controller (INTC)
    • Dynamic CONTROLSS XBAR Integration

High-Speed Interfaces:

  • Integrated 3-port Gigabit Ethernet switch (CPSW) supporting up to two external ports
    • MII (10/100), RMII (10/100), or RGMII (10/100/1000)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • 512x ALE engine-based Packet Classifiers
    • Priority flow control with up to 2KB packet size
    • Four CPU hardware interrupt pacing
    • IP/UDP/TCP checksum offload in hardware

Security:

  • Hardware Security Module (HSM) with support for Auto SHE 1.1/EVITA
    • Arm Cortex-M4F based dedicated security controller
    • Isolated and secured RAMs
    • Peripherals like Timers, WWDT, RTC, Interrupt Controller
    • Safety related peripherals like CRC, ESM, PBIST
  • Secure boot support
    • Device Take Over Protection
    • Hardware-enforced root-of-trust (RoT)
      • Support for two sets of RoT keys
    • Authenticated boot support
      • Encrypted boot support
    • SW Anti-rollback protection
  • Debug security
    • Secure device debug only after cryptographic authentication
    • Support for permanent debug/JTAG disable
  • Device ID and Key Management
    • Unique ID (SoC ID)
    • Support for OTP Memory (FUSEROM)
  • Extensive Firewall Support
    • System Memory Protection Units (MPU) present at various interfaces
  • Cryptographic Acceleration
    • Cryptographic cores with DMA Support
    • AES - 128/192/256-bit key sizes
    • SHA2 - 256/384/512-bit support
    • Deterministic random bit generator (DRBG) with pseudo and true random number generator (TRNG)
    • Public Key Accelerator (PKA) to assist in RSA/Elliptic Curve Cryptography (ECC) processing

Functional Safety:

  • Enables design of systems with functional safety requirements
    • Error Signaling Module (ESM) with designated SAFETY_ERRORn pin
    • ECC or parity on calculation-critical memories
    • 4x Dual Clock Comparators (DCC)
    • 3x Self-Test Controller (STC)
    • Programmable Built-In Self-Test (PBIST) and fault-injection for CPU and on-chip RAM
    • Runtime internal diagnostic modules including voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engines for memory integrity checks
  • Functional Safety-Compliant targeted [Industrial]
    • Developed for functional safety applications
    • Documentation to be made available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL-3 targeted
    • Hardware integrity up to SIL-3 targeted
    • Safety-related certification
      • IEC 61508 planned
  • Functional Safety-Compliant targeted [Automotive]
    • Developed for functional safety applications
    • Documentation to be made available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL-D targeted
    • Hardware integrity up to ASIL-D targeted
    • Safety-related certification
      • ISO 26262 planned

Data Storage

  • 1x 4-bit Multi-Media Card/Secure Digital (MMC/SD) interface

Power Management

  • Recommended TPS653860-Q1 Power Management ICs (PMIC)
    • Companion PMIC specially designed to meet device power supply requirements
    • Flexible mapping and factory programmed configurations to support different use cases

Technology / Package:

  • AEC-Q100 qualified for automotive applications
  • 45nm technology
  • ZCZ Package
    • AM263x Compatible (ZCZ-C)
      • Pin-to-Pin compatible option with AM263x
    • AM263Px Resolver (ZCZ-S)
      • Adds new Resolver Subsystem functionality
    • AM263Px Resolver with Flash-in-Package (ZCZ-F)
      • Includes 1x internally connected Silicon in Package (SIP) 64Mb ISSI IS25LX064-JWLA3 OSPI Flash device; up to 133MHz SDR and DDR
    • 324-pin NFBGA
    • 15.0mm x 15.0mm
    • 0.8mm pitch

The AM263Px Sitara™ Arm® Microcontrollers are built to meet the complex real-time processing needs of next generation industrial and automotive embedded products. The AM263Px MCU family consists of multiple pin-to-pin compatible devices with up to four 400MHz Arm® Cortex®-R5F cores. As an option, the Arm® R5F subsystem can be programmed to run in lockstep or dual-core mode for multiple functional safety configurations. The industrial communications subsystem (PRU-ICSS) enables integrated industrial Ethernet communication protocols such as PROFINET®, Ethernet/IP®, EtherCAT® (among many others), standard Ethernet connectivity, and even custom I/O interfaces. The family is designed for the future of motor control and digital power applications with advanced analog sensing and digital actuation modules.

The multiple R5F cores are arranged in cluster subsystems with 256KB of shared tightly coupled memory (TCM) along with 3MB of shared SRAM, greatly reducing the need for external memory. Extensive ECC is included for on-chip memories, peripherals, and interconnects for enhanced reliability. Granular firewalls managed by the Hardware Security Manager (HSM) enable developers to implement stringent security-minded system design requirements. Cryptographic acceleration and secure boot are also available on AM263Px devices.

TI provides a complete set of microcontroller software and development tools for the AM263Px family of microcontrollers.

The AM263Px Sitara™ Arm® Microcontrollers are built to meet the complex real-time processing needs of next generation industrial and automotive embedded products. The AM263Px MCU family consists of multiple pin-to-pin compatible devices with up to four 400MHz Arm® Cortex®-R5F cores. As an option, the Arm® R5F subsystem can be programmed to run in lockstep or dual-core mode for multiple functional safety configurations. The industrial communications subsystem (PRU-ICSS) enables integrated industrial Ethernet communication protocols such as PROFINET®, Ethernet/IP®, EtherCAT® (among many others), standard Ethernet connectivity, and even custom I/O interfaces. The family is designed for the future of motor control and digital power applications with advanced analog sensing and digital actuation modules.

The multiple R5F cores are arranged in cluster subsystems with 256KB of shared tightly coupled memory (TCM) along with 3MB of shared SRAM, greatly reducing the need for external memory. Extensive ECC is included for on-chip memories, peripherals, and interconnects for enhanced reliability. Granular firewalls managed by the Hardware Security Manager (HSM) enable developers to implement stringent security-minded system design requirements. Cryptographic acceleration and secure boot are also available on AM263Px devices.

TI provides a complete set of microcontroller software and development tools for the AM263Px family of microcontrollers.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 AM263Px Sitara™ Microcontrollers with Optional Flash-in-Package datasheet (Rev. D) PDF | HTML 2025/5/19
* 使用指南 AM263Px Sitara Microcontrollers Technical Reference Manual (Rev. D) PDF | HTML 2025/7/29
* 使用指南 AM263Px Sitara Microcontrollers Register Addendum (Rev. B) 2025/6/2
* 勘誤表 AM263Px Errata Document (Rev. D) PDF | HTML 2026/5/21
應用說明 Designing a Deterministic scalable Ethernet backbone for Robotics PDF | HTML 2026/6/15
功能安全資訊 AM261x, AM263x, and AM263Px Software Diagnostics Library TUV SUD Functional Safety Certificate (Rev. B) 2026/4/1
白皮書 Integrating EVCC, DCDC, and Host Architecture: TI Automotive MCUs for Next-Generation EV Charging (Rev. A) PDF | HTML 2025/11/13
白皮書 TSN in Automotive Zone Architectures: Enabling Ethernet Ring Architectures and AVB-Distributed Audio PDF | HTML 2025/10/16
Product overview AM26xx Family TIFS-SDK Product Brief PDF | HTML 2025/5/29
功能安全資訊 AM263Px TÜV SÜD Functional Safety Certificate 2025/5/27
功能安全資訊 AM263Px TÜV SÜD Functional Safety Certificate Report 2025/5/27
應用說明 AM26x Custom PCB System Getting Started Guide (Rev. A) PDF | HTML 2025/5/13
使用指南 AM26x Hardware Design Guidelines (Rev. D) PDF | HTML 2025/5/2
使用指南 AM263Px MCAL user guide 2025/4/28
應用說明 How to Synchronize the Timing Between Chips With Programmable Real-Time Unit PDF | HTML 2025/3/10
應用說明 Enabling Trace on AM26x Devices with Lauterbach® PDF | HTML 2024/12/18
應用說明 AM26x Family Migration Overview (Rev. A) PDF | HTML 2024/11/15
Application brief Achieving Faster Secure Boot Time on AM26x Devices PDF | HTML 2024/11/13
白皮書 Enhancing System Performance Using Optiflash Memory Technology PDF | HTML 2024/10/14
技術文章 開發新一代電氣化推進系統 PDF | HTML Download English Version PDF | HTML 2024/5/20
使用指南 AM263P OSPI, QSPI Flash Selection Guide PDF | HTML 2024/4/22
應用說明 Clock Edge Delay Compensation With Isolated Modulators Digital Interface to MCUs (Rev. A) PDF | HTML 2024/1/12
應用說明 AM263Px Control Card Quick Start Guide PDF | HTML 2024/1/12
技術文章 How OptiFlash memory technology leverages external flash to solve challenges in software-defined systems PDF | HTML 2024/1/5
技術文章 Three key components needed to boost performance of next generation EV traction inverters PDF | HTML 2024/1/5
應用說明 OptiFlash Memory Technology (Rev. A) PDF | HTML 2023/11/27
Product overview Functional Safety for AM2x and Hercules™ Microcontrollers PDF | HTML 2023/11/8
應用說明 Sitara MCU Thermal Design PDF | HTML 2023/9/11
應用說明 Using the Sitara MCU AM263x in an Automotive SiC Traction Inverter PDF | HTML 2023/8/16
應用說明 Integration of MbedTLS on SITARA MCU Devices PDF | HTML 2023/8/3
應用說明 Intra Drive Communication Using 8b-10b Line Code With Programmable Real Time Uni PDF | HTML 2023/5/24
應用說明 Interfacing 5V Sensors and Signals to 3.3V Input SAR ADCs PDF | HTML 2023/2/9
應用說明 DCC Computation Tool PDF | HTML 2023/2/3
應用說明 Debugging Sitara AM2x Microcontrollers PDF | HTML 2022/10/24
技術文章 What is “real-time control” and why do you need it? PDF | HTML 2022/4/6
技術文章 How MCUs can unlock the full potential of electrification designs PDF | HTML 2022/3/21

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開發板

DP83TG720-EVM-AM2 — 適用於汽車乙太網路 PHY 附加電路板的 AM2x 評估模組

DP83TG720-EVM-AM2 是一款汽車乙太網路 PHY 附加電路板，可搭配 AM2x 系列 Sitara™ 高性能微控制器評估模組使用。此附加電路板適合使用 AM2x EVM 進行初始乙太網路評估與原型設計。DP83TG720-EVM-AM2 配備具有 RGMII & SGMII 的 TI DP82TG720S-Q1 1000BASE-T1 車用乙太網路 PHY，以及 MATEnet 連接器。TMDSCNCD263P 和 AM263Px MCU PLUS SDK 目前均支援 DP83TG720-EVM-AM2。

使用指南: PDF | HTML
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開發板

LP-AM263P — AM263Px Arm® 架構 MCU 通用型 LaunchPad™ 開發套件

LP-AM263P 為 AM263Px 系列的 Sitara™ 高性能微控制器 (MCU) 的成本最佳化開發電路板。此電路板為初始評估與原型而設計，因為它提供標準化且使用方便的平台，可用於開發您的下一個應用程式。

LP-AM263P 配備了 Sitara AM263P4 處理器及其他零組件，可讓您使用各種裝置介面，其中包括工業乙太網路 (IE)、標準乙太網路、快速序列介面 (FSI) 及其他功能，來輕鬆建立原型。AM263P4 支援各種 IE 協定如 EtherCAT、EtherNet/IP 和 PROFINET®。

延伸 LaunchPad™ XL 開發套件提供額外的 I/O (...)

使用指南: PDF | HTML
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開發板

TMDSCNCD263P — AM263Px 通用 controlCARD™ 開發套件 Arm® 架構 MCU

TMDSCNCD263P 是適用於 AM263Px 系列 Sitara™ 高性能微控制器的 HSEC180 controlCARD 型評估和開發工具。此電路板極適用於初始評估與原型，因為它提供標準化且使用方便的平台，可用於開發您的下一個應用程式。AM263P 控制卡配備了 Sitara AM263P4 處理器與 PMIC 型電源解決方案及其他零組件，可讓使用者使用各種裝置介面，其中包括工業乙太網路、標準乙太網路、快速序列介面 (FSI) 及其他功能，以輕鬆開發和測試應用程式。AM263P4 支援 EtherCAT、EtherNet/IP 和 PROFINET 等各種工業乙太網路通訊協定。

(...)

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開發板

TMDSHSECDOCK-AM263 — 適用於 GPMC、JTAG/TRACE、MCAN 和 LIN 訊號的 AM263x-CC HSEC 底座和斷路板。

此評估模組是用於 TMDSCNCD263 (AM263x controlCARD) 和 TMDSCNCD263P (AM263Px controlCARD) 的高速邊緣卡 (HSEC) 擴充塢，用於擴充關鍵 I/O 和硬體周邊設備。此電路板向處於評估和開發階段的客戶展示了 AM263x 和 AM263Px 上的 MCU+ SDK 的功能。除了 TMDSHSECDOCK 的功能外，此電路板還支援其他 AM263x 和 AM263Px 系列功能，例如 CAN/LIN、GPMC (僅限 AM263x)、TRACE 和 JTAG。TMDSHSECDOCK-AM263 包括一個板載 64Mb (...)
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子卡

TMDSHSECDOCK — HSEC180 controlCARD 基板擴充站

TMDSHSECDOCK 為一塊基板，可為相容的 HSEC180 架構 controlCARD 提供關鍵訊號的接頭針腳存取。提供模擬板區域以快速進行原型設計。電路板電源可由 USB 纜線或 5-V 桶式電源供應器供電。

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偵錯探測器

TMDSEMU110-U — XDS110 JTAG 偵錯探測器

德州儀器 XDS110 是一種全新的偵錯探測器 (模擬器) 類別，適用於 TI 嵌入式處理器。XDS110 取代 XDS100 系列，可在單一 Pod 中支援更廣泛的標準 (IEEE1149.1、IEEE1149.7、SWD)。同時，所有 XDS 偵錯探針在所有配備嵌入式追蹤緩衝器 (ETB) 的 Arm® 與 DSP 處理器中均支援核心與系統追蹤。  對於針腳上的核心追蹤，則需要 XDS560v2 PRO TRACE。

德州儀器 XDS110 透過 TI 20 針腳連接器（具有用於 TI 14 針腳和 Arm 10 針腳和 Arm 20 針腳的多轉接器）連接到目標電路板，並透過 USB2.0 (...)

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偵錯探測器

TMDSEMU560V2STM-U — XDS560™ 軟體 v2 系統追蹤 USB 偵錯探測器

XDS560v2 是 XDS560™ 系列偵錯探測器中性能最高的，且同時支援傳統 JTAG 標準 (IEEE1149.1) 與 cJTAG (IEEE1149.7)。  請注意，其不支援序列線偵錯 (SWD)。

所有 XDS 偵錯探測器均在所有配備嵌入式追蹤緩衝器 (ETB) 的 ARM 與 DSP 處理器中支援核心與系統追蹤。  對於針腳上的追蹤，則需要 XDS560v2 PRO TRACE。

XDS560v2 透過 MIPI HSPT 60 針腳接頭 (具有用於 TI 14 針腳、TI 20 針腳和 ARM 20 針腳的多轉接器) 連接到目標電路板，並透過 USB2.0 高速 (...)

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偵錯探測器

TMDSEMU560V2STM-UE — XDS560v2 System Trace USB 與乙太網路偵錯探測器

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

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偵錯探測器

LB-3P-TRACE32-ARM — 適用於 Arm® 架構微控制器和處理器的 Lauterbach TRACE32® 偵錯和追蹤系統

Lauterbach 的 TRACE32® 工具是一套先進的軟硬體元件，可讓開發人員分析、最佳化及認證各種 Arm® 架構微控制器和處理器。全球知名的嵌入式系統和 SoC 偵錯和追蹤解決方案是完美的解決方案，適用於從早期的矽前 (pre-silicon) 開發，到產品認證和現場故障排除等所有開發階段。Lauterbach 工具的直覺模組化設計為工程師提供現今最高的可用性能，以及可隨需求變化而調整和成長的系統。藉由 TRACE32® 偵錯器，開發人員也可透過單一偵錯介面，同時偵錯和控制 SoC 中的任何 C28x/C29x/C6x/C7x DSP 核心及所有其他 Arm (...)

從：Lauterbach GmbH
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偵錯探測器

TSK-3P-BLUEBOX — TASKING BlueBox hardware debugger

TASKING’s Debug, Trace, and Test tools offer comprehensive solutions for efficient debugging, tracing, and testing of TI's embedded systems. The scalable TASKING BlueBox debuggers allow users to easily flash, debug, and test across TI's portfolio. Development on TI hardware is made even easier with (...)

從：TASKING Germany GmbH
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軟體開發套件 (SDK)

AM263PX-MCAL-SDK — Microcontroller Abstraction Layer (MCAL) and Complex Device Drivers (CDD) for AM263PX

AM263Px 微控制器 (MCU) 外加軟體開發套件 (SDK) 是一套專為嵌入式處理器所設計的統合軟體平台，設定簡單且可立即存取範例、基準測試與示範。此軟體不必從頭開始建立基本系統軟體功能，所以能加速應用程式開發時程。

 

SDK 內含 R5F 及 M4 核心、範例、驅動程式和開機載入程式的支援。SDK 的確切內容視裝置的功能而定，但所有裝置都共享通用應用程式介面 (API)，並建置在現有經實證的軟體元件上，以確保可靠性和品質。軟體元件經過完整測試，確保其可搭配 Code Composer Studio™ 整合式開發環境 (CCSTUDIO) 共同運作。

 

軟體支援：

  • (...)
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軟體開發套件 (SDK)

AM263PX-RESTRICTED-SECURITY — AM263Px restricted security content

AM263Px 微控制器 (MCU) 外加軟體開發套件 (SDK) 是一套專為嵌入式處理器所設計的統合軟體平台，設定簡單且可立即存取範例、基準測試與示範。此軟體不必從頭開始建立基本系統軟體功能，所以能加速應用程式開發時程。

 

SDK 內含 R5F 及 M4 核心、範例、驅動程式和開機載入程式的支援。SDK 的確切內容視裝置的功能而定，但所有裝置都共享通用應用程式介面 (API)，並建置在現有經實證的軟體元件上，以確保可靠性和品質。軟體元件經過完整測試，確保其可搭配 Code Composer Studio™ 整合式開發環境 (CCSTUDIO) 共同運作。

 

軟體支援：

  • (...)
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軟體開發套件 (SDK)

MCU-PLUS-SDK-AM263PX — MCU+ SDK for AM263Px - RTOS, No-RTOS

AM263Px 微控制器 (MCU) 外加軟體開發套件 (SDK) 是一套專為嵌入式處理器所設計的統合軟體平台，設定簡單且可立即存取範例、基準測試與示範。此軟體不必從頭開始建立基本系統軟體功能，所以能加速應用程式開發時程。

 

SDK 內含 R5F 及 M4 核心、範例、驅動程式和開機載入程式的支援。SDK 的確切內容視裝置的功能而定，但所有裝置都共享通用應用程式介面 (API)，並建置在現有經實證的軟體元件上，以確保可靠性和品質。軟體元件經過完整測試，確保其可搭配 Code Composer Studio™ 整合式開發環境 (CCSTUDIO) 共同運作。

 

軟體支援：

  • (...)
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IDE、配置、編譯器或偵錯程式

CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)

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IDE、配置、編譯器或偵錯程式

EDGE-AI-STUDIO-MCU — Edge AI Studio for Microcontrollers

Edge AI Studio 是一系列圖形和命令行工具，旨在加速 TI 處理器、微控制器和雷達感測器上的邊緣 AI 開發。不管是使用來自 TI Model Zoo 的模型，還是
運用您自己的模型來開發概念驗證，Edge AI Studio 都能提供您所需的工具。

Edge AI Studio 圖形使用者介面提供完全整合的解決方案，用於收集和註釋資料、訓練和編譯模型，以在即時開發平台上部署。從 TI Model Zoo 中的各種預先訓練的模型中選擇，並可選擇透過自訂資料重新訓練，以提升準確度和性能。Edge AI Studio (...)

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IDE、配置、編譯器或偵錯程式

SYSCONFIG — Standalone desktop version of SysConfig

CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.

SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)

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IDE、配置、編譯器或偵錯程式

TSK-3P-VX-TOOLSET — 適用於 Arm 的 TASKING VX 工具套件

適用於 Arm 的 VX 工具套件是一套經過認證的編譯器工具鏈，可用於指定 Cortex-M 與 Cortex-R 核心裝置的安全關鍵嵌入式軟體開發。透過整合 Eclipse IDE、進階多核心支援，以及與 TASKING BlueBox 除錯器的相容性，VX 工具套件可簡化開發流程。通過 TÜV NORD 認證，符合 ISO 26262（最高支援 ASIL D）及 ISO 21434 標準。

從：TASKING Germany GmbH
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線上培訓

AM26X-ACADEMY — AM26x academy

AM26x Academy features easy-to-use training modules ranging from the basics of getting started to advanced development topics.
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快速入門

TI-DEVELOPER-ZONE — Start embedded development on your desktop or in the cloud

From evaluation to deployment the TI Developer Zone provides a comprehensive range of software, tools and training to ensure that you have everything you need for each stage of the development process.
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應用軟體及架構

AM263PX-RESTRICTED-SAFETY — AM263Px restricted functional safety content

AM263Px restricted functional safety content
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應用軟體及架構

EB-3P-TRESOS — Elektrobit EB tresos Classis AUTOSAR 軟體

Elektrobit 在基本軟體領域擁有數十年經驗，其 EB tresos 產品線和自訂 Classic AUTOSAR 解決方案，可提供最先進的軟體，協助滿足各個汽車製造商的特定需求。Elektrobit 可對每個專案提供符合汽車 AUTOSAR 需求的適當解決方案，從符合 OSEK/VDX 規範的基本軟體，到以 Classic AUTOSAR 為基礎的多核心與功能安全系統，都包含在內。

從：Elektrobit
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韌體

USIT-3P-SECIC-HSM — Uni-Sentry SecIC-HSM 韌體

SecIC-HSM 旨在滿足 MCU/SoC 晶片所需的網路安全要求。HSM 韌體可應用於汽車、新能源、光伏、機器人、醫療保健與航空等領域。提供的網路安全功能包括安全開機、安全通訊 (SecOC)、安全診斷、安全儲存、安全更新、安全偵錯和金鑰管理。SecIC-HSM 的優點：一站式網路安全解決方案，具備跨晶片系列的全方位軟體相容性，擁有業界領先的性能，已在近 30 家 OEM 的量產車型中成功部署，累計出貨超過 300 萬套。

從：Shanghai Uni-Sentry Intelligent Technology Co., LTD
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韌體

USIT-3P-SECIC-PQC — Uni-Sentry SecIC-PQC 演算法韌體

Uni-Sentry 的安全解決方案採用 PQC 演算法，能夠抵抗量子電腦對傳統加密演算法所造成的解密威脅。PQC 韌體與硬體安全模組 (HSM) 進行協同優化，利用硬體加速與安全性強化，以提升加密演算法的執行效率與安全性。 


Uni-Sentry 持續監控全球量子運算的發展，並更新其演算法組合。當前的 PQC 產品功能包括：

  • SP 800-208：LMS 和 XMSS
  • FIPS 203 (ML-KEM)：CRYSTALS-KYBER
  • FIPS 204 (ML-DSA)：CRYSTALS-Dilithium
  • FIPS 205 (SLH-DSA)： SPHINCS+ 

技術亮點 

  • 量子抗性認證：與 (...)
從：Shanghai Uni-Sentry Intelligent Technology Co., LTD
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軟體程式設計工具

UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash 是 TI 龐大 CCStudio™ 開發生態系統的一部分，是一款用於在 TI 微控制器與無線連線裝置上對晶片內快閃記憶體進行燒錄，以及在 TI 處理器上對板載快閃記憶體進行燒錄的軟體工具。UniFlash 提供圖形化介面與命令行介面，並可在桌面上或雲端中執行。

UniFlash 可從 CCStudio™ 開發人員區上的雲端執行，或在下載後於 Windows®、Linux® 和 macOS® 電腦中使用。

請注意，mmWave、AMx、K2G 和 J7 裝置不支援 macOS。AMx、K2G 和 J7 裝置僅於命令列上支援。

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支援軟體

MATHW-3P-AM26X-EC — 德州儀器 AM26x MCU 嵌入式編碼器支援封裝

TI 為各種 AM26x 裝置和評估電路板提供基於模型設計的工作流程。

適用於 AM26x controlCARD 和 LaunchPad 電路板的 Embedded Coder® 支援套件可讓您使用 Simulink® 模型，在 AM26x 裝置上自動创建、載入及运行演算法。  模型在 Simulink 中設計，使用 Embedded Coder 產生程式碼，並在專為即時控制應用設計的 AM263x、AM263Px、AM261x 硬體平台上運行可執行文件，無需使用手動編程。運用業界實證的基於模型設計技術，驗證演算法在模擬期間是否能正常運作，然後使用自動產生程式碼，在 AM26X (...)

從：MathWorks, Inc.
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支援軟體

VCTR-3P-MICROSAR — 適用於微控制器和高性能電腦 (HPC) 的 Vector MICROSAR AUTOSAR 軟體

MICROSAR 與 DaVinci 產品系列透過適用於微控制器與 HPC 的精密嵌入式軟體和強大開發工具，簡化 ECU 開發。有了先進的基礎架構軟體，您即可為 ECU 建立最佳基礎，並利用相關工具簡化所有相關開發作業。MICROSAR 嵌入式軟體是根據 AUTOSAR 經典和適應性等相關標準所開發。軟體也適合符合最高 ASIL D 之 ISO 26262 標準的安全相關應用。此外，智慧網路安全功能可保護控制單元免受未經授權的存取和竄改。Vector 涵蓋所有汽車與其他工業應用的使用案例。對於配備高性能電腦的軟體定義車輛 (SDV)，其可提供現代車輛作業系統，以做為開放式模組化軟體生態系統。

從：Vector Informatik GmbH
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模擬型號

AM263Px BSDL Model (Rev. A)

SPRM835A.ZIP (10 KB) - BSDL 模型
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模擬型號

AM263Px IBIS Model

SPRM834.ZIP (4124 KB) - IBIS 模型
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模擬型號

AM263Px Thermal Model

SPRM833.ZIP (6 KB) - 熱模型
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計算工具

AM263PX-PWR-EST-CALC — AM263Px power-estimation tool

The power estimation spreadsheet provides power consumption estimates based on measured and simulated data; they are provided “as is” and are not ensured within a specified precision.
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參考設計

TIDA-020079 — 區域參考設計

此參考設計展示了新一代區域控制模組的主要功能，包括電源分配、負載致動和車內網路。此設計著重於功能安全相容 PMIC 與微控制器 (MCU) 設計，具備理想二極體控制器的備援電源供應管理，以及用於安全配電的智慧 eFuse。此設計也具備區域控制模組中常見的各種負載致動選項，例如高壓側驅動器、馬達驅動器、可配置驅動器和 D 類音訊放大器。區域參考設計展現了各種通訊協定，例如乙太網路、CAN 和 LIN，並支援乙太網路 AVB、10BASE-T1S 和 CAN FD Light 等車輛網路技術的新興趨勢。
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
NFBGA (ZCZ) 324 Ultra Librarian
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建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

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