CD4016B
- 20V digital or ± 10V peak-to-peak switching
- 280Ω typical on-state resistance for 15V operation
- Switch on-state resistance matched to within 10Ω typ over 15V signal-input range
- High on/off output-voltage ratio: 65dB typ at f is = 10kHz, RL= 10kΩ
- High degree of linearity: <0.5% distortion typat f is= 1kHz, V is= 5Vp-p, V DD −V SS ⩾10V, R L = 10kΩ
- Extremely low off-state switch leakage resulting in very low offset current and high effective off-state resistance: 100pA typ. at V DD −V SS =18V, T A=25°C
- Extremely high control input impedance (control circuit isolated from signal circuit: 10 12 Ω typ.
- Low crosstalk between switches: −50dB typ at f is = 0.9MHz, R L = 1kΩ
- Matched control-input to signal-output capacitance: Reduces output signal transients
- Frequency response, switch on = 40MHz (typical)
- 100% tested for quiescent current at 20V
- Maximum control input current of 1µA at 18V over full package temperature range; 100nA at 18V at 25°C
- 5V, 10V, and 15V parametric ratings
For transmission or multiplexing of analog or digital signals high-voltage types (20V rating).
CD4016B B Series types are quad bilateral switches intended for the transmission or multiplexing of analog or digital signals. Each of the four independent bilateral switches has a single control signal input which simultaneously biases both the p and n device in a given switch on or off.
The CD4016B B Series types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | CD4016B Types CMOS Quad Bilateral Switch datasheet (Rev. E) | PDF | HTML | 2024年 8月 9日 |
| Application note | Selecting the Correct Texas Instruments Signal Switch (Rev. E) | PDF | HTML | 2022年 6月 2日 | |
| Application note | Multiplexers and Signal Switches Glossary (Rev. B) | PDF | HTML | 2021年 12月 1日 | |
| Selection guide | Logic Guide (Rev. AB) | 2017年 6月 12日 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015年 12月 2日 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 2007年 1月 16日 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 | ||
| User guide | Signal Switch Data Book (Rev. A) | 2003年 11月 14日 | ||
| Application note | Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics | 2001年 12月 3日 | ||
| Selection guide | Logic Guide (Rev. AC) | PDF | HTML | 1994年 6月 1日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
LEADED-ADAPTER1 — 適用於快速測試 TI 的 5、8、10、16 及 24 針腳引線封裝的表面貼裝至 DIP 接頭適配器
EVM-LEADED1 板可用於快速測試和搭建 TI 常見的有引腳封裝 此電路板具備板上配置，可將 TI 的 D、DBQ、DCT、DCU、DDF、DGS、DGV 和 PW 表面黏著封裝轉換為 100mil DIP 排針。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| PDIP (N) | 14 | Ultra Librarian |
| SOIC (D) | 14 | Ultra Librarian |
| SOP (NS) | 14 | Ultra Librarian |
| TSSOP (PW) | 14 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。