CD4051B
- Wide range of digital and analog signal levels:
- Digital: 3V to 20V
- Analog: ≤ 20VP-P
- Low ON resistance, 125Ω (typical) over 15VP-P signal input range for VDD – VEE = 18V
- High OFF resistance, channel leakage of ±10pA (typical) at VDD – VEE = 18V
- Logic-level conversion for digital addressing signals of 3V to 20V (VDD – VSS = 3V to 20V) to switch analog signals to 20VP-P (VDD – VEE = 20V) matched switch characteristics, rON = 5Ω (typical) for VDD – VEE = 15V very low quiescent power dissipation under all digital-control input and supply conditions, 0.2µW (typical) at VDD – VSS = VDD – VEE = 10V
- Binary address decoding on chip
- 5V, 10V, and 15V parametric ratings
- 100% tested for quiescent current at 20V
- Maximum input current of 1µA at 18V over full package temperature range, 100nA at 18V and 25°C
- Break-before-make switching eliminates channel overlap
The CD405xB analog multiplexers and demultiplexers are digitally-controlled analog switches having low ON impedance and very low OFF leakage current. These multiplexer circuits dissipate extremely low quiescent power over the full VDD – VSS and VDD – VEE supply-voltage ranges, independent of the logic state of the control signals.
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檢視所有 9 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | CD405xB CMOS Single 8-Channel Analog Multiplexer or Demultiplexer With Logic-Level Conversion datasheet (Rev. M) | PDF | HTML | 2024年 11月 15日 |
| Application note | Selecting the Correct Texas Instruments Signal Switch (Rev. E) | PDF | HTML | 2022年 6月 2日 | |
| Application note | Multiplexers and Signal Switches Glossary (Rev. B) | PDF | HTML | 2021年 12月 1日 | |
| Selection guide | Logic Guide (Rev. AB) | 2017年 6月 12日 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015年 12月 2日 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 2007年 1月 16日 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 | ||
| User guide | Signal Switch Data Book (Rev. A) | 2003年 11月 14日 | ||
| Application note | Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics | 2001年 12月 3日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
介面轉接器
LEADED-ADAPTER1 — 適用於快速測試 TI 的 5、8、10、16 及 24 針腳引線封裝的表面貼裝至 DIP 接頭適配器
The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
使用指南: PDF
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| PDIP (N) | 16 | Ultra Librarian |
| SOIC (D) | 16 | Ultra Librarian |
| SOP (NS) | 16 | Ultra Librarian |
| TSSOP (PW) | 16 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。