產品詳細資料

Rating Catalog Architecture Gate driver Control interface 1xPWM, 3xPWM, 6xPWM Gate drive (A) 1 Vs (min) (V) 6 Vs ABS (max) (V) 65 Features Hardware Management I/F, SPI/I2C, Smart Gate Drive Operating temperature range (°C) -40 to 125
Rating Catalog Architecture Gate driver Control interface 1xPWM, 3xPWM, 6xPWM Gate drive (A) 1 Vs (min) (V) 6 Vs ABS (max) (V) 65 Features Hardware Management I/F, SPI/I2C, Smart Gate Drive Operating temperature range (°C) -40 to 125
WQFN (RTV) 32 25 mm² 5 x 5
  • Triple Half-Bridge Gate Driver
    • Drives 3 High-Side and 3 Low-Side N-Channel MOSFETs (NMOS)
  • Smart Gate Drive Architecture
    • Adjustable Slew Rate Control
    • 10-mA to 1-A Peak Source Current
    • 20-mA to 2-A Peak Sink Current
  • Integrated Gate Driver Power Supplies
    • Supports 100% PWM Duty Cycle
    • High-Side Charge Pump
    • Low-Side Linear Regulator
  • 6 to 60-V Operating Voltage Range
  • Optional Integrated DC/DC Buck Regulator
    • LMR16006X SIMPLE SWITCHER
    • 4 to 60-V Operating Voltage Range
    • 0.8 to 60-V, 600-mA Output Capability
  • Optional Integrated Triple Low-Side Current Sense Amplifiers (CSAs)
    • Adjustable Gain (5, 10, 20, 40 V/V)
    • Bidirectional or Unidirectional Support
  • SPI and Hardware Interface Available
  • 6x, 3x, 1x, and Independent PWM Modes
  • Supports 1.8-V, 3.3-V, and 5-V Logic Inputs
  • Low-Power Sleep Mode (12 µA)
  • Linear Voltage Regulator, 3.3 V, 30 mA
  • Compact QFN Packages and Footprints
  • Efficient System Design With Power Blocks
  • Integrated Protection Features
    • VM Undervoltage Lockout (UVLO)
    • Charge Pump Undervoltage (CPUV)
    • MOSFET Overcurrent Protection (OCP)
    • Gate Driver Fault (GDF)
    • Thermal Warning and Shutdown (OTW/OTSD)
    • Fault Condition Indicator (nFAULT)
  • Triple Half-Bridge Gate Driver
    • Drives 3 High-Side and 3 Low-Side N-Channel MOSFETs (NMOS)
  • Smart Gate Drive Architecture
    • Adjustable Slew Rate Control
    • 10-mA to 1-A Peak Source Current
    • 20-mA to 2-A Peak Sink Current
  • Integrated Gate Driver Power Supplies
    • Supports 100% PWM Duty Cycle
    • High-Side Charge Pump
    • Low-Side Linear Regulator
  • 6 to 60-V Operating Voltage Range
  • Optional Integrated DC/DC Buck Regulator
    • LMR16006X SIMPLE SWITCHER
    • 4 to 60-V Operating Voltage Range
    • 0.8 to 60-V, 600-mA Output Capability
  • Optional Integrated Triple Low-Side Current Sense Amplifiers (CSAs)
    • Adjustable Gain (5, 10, 20, 40 V/V)
    • Bidirectional or Unidirectional Support
  • SPI and Hardware Interface Available
  • 6x, 3x, 1x, and Independent PWM Modes
  • Supports 1.8-V, 3.3-V, and 5-V Logic Inputs
  • Low-Power Sleep Mode (12 µA)
  • Linear Voltage Regulator, 3.3 V, 30 mA
  • Compact QFN Packages and Footprints
  • Efficient System Design With Power Blocks
  • Integrated Protection Features
    • VM Undervoltage Lockout (UVLO)
    • Charge Pump Undervoltage (CPUV)
    • MOSFET Overcurrent Protection (OCP)
    • Gate Driver Fault (GDF)
    • Thermal Warning and Shutdown (OTW/OTSD)
    • Fault Condition Indicator (nFAULT)

The DRV832x family of devices is an integrated gate driver for three-phase applications. The devices provide three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The DRV832x generates the correct gate drive voltages using an integrated charge pump for the high-side MOSFETs and a linear regulator for the low-side MOSFETs. The Smart Gate Drive architecture supports peak gate drive currents up to 1A source and 2A. The DRV832x can operate from a single power supply and supports a wide input supply range of 6 to 60 V for the gate driver and 4 to 60 V for the optional buck regulator.

The 6x, 3x, 1x, and independent input PWM modes allow for simple interfacing to controller circuits. The configuration settings for the gate driver and device are highly configurable through the SPI or hardware (H/W) interface. The DRV8323 and DRV8323R devices integrate three low-side current sense amplifiers that allow bidirectional current sensing on all three phases of the drive stage. The DRV8320R and DRV8323R devices integrate a 600mA DC/DC buck regulator.

A low-power sleep mode is provided to achieve low quiescent current draw by shutting down most of the internal circuitry. Internal protection functions are provided for undervoltage lockout, charge pump fault, MOSFET overcurrent, MOSFET short circuit, gate driver fault, and overtemperature. Fault conditions are indicated on the nFAULT pin with details through the device registers for SPI device variants.

The DRV832x family of devices is an integrated gate driver for three-phase applications. The devices provide three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The DRV832x generates the correct gate drive voltages using an integrated charge pump for the high-side MOSFETs and a linear regulator for the low-side MOSFETs. The Smart Gate Drive architecture supports peak gate drive currents up to 1A source and 2A. The DRV832x can operate from a single power supply and supports a wide input supply range of 6 to 60 V for the gate driver and 4 to 60 V for the optional buck regulator.

The 6x, 3x, 1x, and independent input PWM modes allow for simple interfacing to controller circuits. The configuration settings for the gate driver and device are highly configurable through the SPI or hardware (H/W) interface. The DRV8323 and DRV8323R devices integrate three low-side current sense amplifiers that allow bidirectional current sensing on all three phases of the drive stage. The DRV8320R and DRV8323R devices integrate a 600mA DC/DC buck regulator.

A low-power sleep mode is provided to achieve low quiescent current draw by shutting down most of the internal circuitry. Internal protection functions are provided for undervoltage lockout, charge pump fault, MOSFET overcurrent, MOSFET short circuit, gate driver fault, and overtemperature. Fault conditions are indicated on the nFAULT pin with details through the device registers for SPI device variants.

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技術文件

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重要文件 類型 標題 格式選項 日期
* Data sheet DRV832x 6 to 60-V Three-Phase Smart Gate Driver datasheet (Rev. D) 2022年 3月 17日
Application brief Brushless-DC Made Simple – Sensored Motor Control (Rev. C) PDF | HTML 2026年 3月 11日
Application brief Understanding Gate Driver Slew Rate Control, MOSFET Switching Optimization and Protection Features (Rev. A) PDF | HTML 2025年 12月 11日
Application note Best Practices for Board Layout of Motor Drivers (Rev. B) PDF | HTML 2021年 10月 14日
Application note Hardware Design Considerations for an Electric Bicycle using BLDC Motor (Rev. B) 2021年 6月 23日
Application note System Design Considerations for High-Power Motor Driver Applications PDF | HTML 2021年 6月 22日
Application brief MSP430 and DRV83xx Selection Guide for Power Tools (Rev. A) PDF | HTML 2021年 6月 14日
Application note Understanding Smart Gate Drive (Rev. D) 2021年 3月 1日
Technical article A basic brushless gate driver design – part 3: integrated vs. discrete half bridge PDF | HTML 2020年 12月 16日
Application brief Low Voltage Motor Drive Operation With Smart Gate Drive 2018年 12月 20日
Application note Architecture for Brushless-DC Gate Drive Systems (Rev. A) 2018年 8月 22日
Application brief Field Oriented Control Made Easy for Brushless DC Motors Using Smart Gate Drive (Rev. B) 2018年 8月 22日
Application note Cut-Off Switch in High-Current Motor-Drive Applications (Rev. A) 2018年 8月 20日
Application note Layout Guide for the DRV832x Family of Three-Phase Smart Gate Drivers 2018年 3月 1日
Technical article A basic brushless gate driver design – part 2 PDF | HTML 2017年 7月 19日
Technical article A Basic Brushless Gate Driver Design – Part 1 PDF | HTML 2017年 6月 12日
User guide BOOSTXL-DRV832X EVM GUI User’s Guide 2017年 2月 8日
Application note Sensored 3-Phase BLDC Motor Control Using MSP430 2011年 7月 20日

設計與開發

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開發板

BOOSTXL-DRV8320H — DRV8320H 三相智慧型閘極驅動器 (硬體介面) 評估模組

BOOSTXL-DRV8320H 評估模組 (EVM) 是基於 DRV8320H 閘極驅動器和 CSD88399Q5DC 雙封裝 MOSFET 的 15A 三相無刷直流驅動級。  此模組具有獨立 DC 匯流排和相位電壓感測,因此此 EVM 最適合無感測器 BLDC 演算法。  此 EVM 包括用於 3.3V MCU 電源的外部降壓穩壓器和外部電流分流放大器。  驅動級具有短路、過熱、擊穿和低電壓保護,並可透過不同的硬體配置接腳輕鬆配置。
使用指南: PDF
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開發板

BOOSTXL-DRV8320S — DRV8320S 三相智慧型閘極驅動器 (SPI 介面) 評估模組

BOOSTXL-DRV8320S 評估模組 (EVM) 是基於 DRV8320S 閘極驅動器和 CSD88399Q5DC 雙封裝 MOSFET 的 15A 三相無刷直流驅動級。  此模組具有獨立 DC 匯流排和相位電壓感測,因此此 EVM 最適合無感測器 BLDC 演算法。  此 EVM 包括用於 3.3V MCU 電源的外部降壓穩壓器和外部電流分流放大器。  驅動級具有短路、過熱、擊穿和低電壓保護,並可透過不同的硬體配置接腳輕鬆配置。
使用指南: PDF
TI.com 無法提供
計算工具

BLDC-MAX-QG-MOSFET-CALCULATOR Calculate the maximum QG MOSFET for your motor driver

Calculate the maximum QG MOSFET that can be driven based on the PWM switching frequency, algorithm type, and additional external capacitance.
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參考設計

TIDA-010031 — 25.2-V、30-A 高速無感測器 (>100 krpm) 無刷 DC 馬達驅動參考設計

此參考設計適用於 6V 至 33.6V DC 饋電無刷 DC (BLDC),支援高達 900W 功率及最高 180,000 rpm 馬達轉速(已驗證至 100,000 rpm)。符合成本效益的智慧型微控制器具備整流點硬體偵測功能,可加快無感測器梯形波控制的速度,並使用速度適應型反電動勢 (BEMF) 偵測。BLDC 功率級體積小巧,效率最佳化,並搭載智慧型三相閘極驅動器,可針對短路,馬達熄火與過熱提供完整防護。
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
WQFN (RTV) 32 Ultra Librarian

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  • 材料內容
  • 認證摘要
  • 進行中的可靠性監測
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