ISO7220A-Q1
- 1 and 25Mbps Signaling Rate Options
- Low Channel-to-Channel Output Skew; 1ns Max
- Low Pulse-Width Distortion (PWD); 1ns Max
- Low Jitter Content; 1ns Typ at 25Mbps
- 50kV/µs Typical Transient Immunity
- Operates with 2.8V (C-Grade), 3.3V, or 5V Supplies
- 4kV ESD Protection
- –40°C to +125°C Operating Range
- Typical 28-Year Life at Rated Voltage (see Isolation Lifetime Projection)
- Safety-Related Certifications
- DIN EN IEC 60747-17 (VDE 0884-17)
- UL 1577 component recognition program
- IEC 61010-1, IEC 62368-1 certifications
The ISO7220x-Q1 and ISO7221x-Q1 family devices are dual-channel digital isolators. To facilitate PCB layout, the channels are oriented in the same direction in the ISO7220x-Q1 and in opposite directions in the ISO7221x-Q1. These devices have a logic input and output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to 4000VPK per VDE. Used in conjunction with isolated power supplies, these devices block high voltage and isolate grounds, as well as prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry.
A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to verify that the proper dc level of the output. If this dc-refresh pulse is not received every 4µs, the input is assumed to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.
The small capacitance and resulting time constant provide fast operation with signaling rates available from 0Mbps (DC) to 25Mbps (The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps). The A-option, and C-option devices have TTL input thresholds and a noise filter at the input that prevents transient pulses from being passed to the output of the device. The M-option devices have CMOS VCC/2 input thresholds and do not have the input noise filter and the additional propagation delay.
The ISO7220x-Q1 and ISO7221x-Q1 family of devices require two supply voltages of 2.8V (C-Grade), 3.3V, 5V, or any combination. All inputs are 5V tolerant when supplied from a 2.8V or 3.3V supply and all outputs are 4mA CMOS.
The ISO7220x-Q1 and ISO7221x-Q1 family of devices are characterized for operation over the ambient temperature range of –40°C to +125°C.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | ISO722x-Q1 Dual-Channel Digital Isolators datasheet (Rev. E) | PDF | HTML | 2024年 11月 13日 |
Certificate | VDE Certificate for Basic Isolation for DIN EN IEC 60747-17 (Rev. W) | 2024年 1月 31日 | ||
White paper | Improve Your System Performance by Replacing Optocouplers with Digital Isolators (Rev. C) | PDF | HTML | 2023年 9月 7日 | |
Certificate | CSA Certificate for ISO722xD | 2023年 3月 15日 | ||
Certificate | UL Certificate of Compliance File E181974 Vol 4 Sec 1 (Rev. A) | 2022年 8月 5日 | ||
White paper | Why are Digital Isolators Certified to Meet Electrical Equipment Standards? | 2021年 11月 16日 | ||
White paper | Distance Through Insulation: How Digital Isolators Meet Certification Requiremen | PDF | HTML | 2021年 6月 11日 | |
Application brief | How to Replace Optocouplers with Digital Isolators in Standard Interface Circuit (Rev. A) | PDF | HTML | 2021年 5月 19日 | |
EVM User's guide | Universal Digital Isolator Evaluation Module | PDF | HTML | 2021年 3月 4日 | |
Application brief | Considerations for Selecting Digital Isolators | 2018年 7月 24日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
DIGI-ISO-EVM — 通用數位隔離器評估模組
DIGI-ISO-EVM 是一款評估模組 (EVM),可評估任何 TI 單通道、雙通道、三通道、四通道或六通道數位隔離器裝置,並提供五種不同封裝 - 8 接腳窄體 SOIC (D)、8 接腳寬體 SOIC (DWV)、16 接腳寬體 SOIC (DWW)、16 接腳超寬體 SOIC (DWW) 和 16 接腳 (DBQ) 封裝。EVM 具備足夠 Berg 接腳選項,可用於評估具最少外部零組件的裝置。
TIDA-00794 — 適用於 HEV/EV 牽引逆變器的 IGBT 模組過熱保護參考設計
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (D) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。