LM25115A
- Power-up/Power-down Tracking
- Self-synchronization to Main Channel Output
- Leading Edge Pulse Width Modulation
- Valley Current Mode Control
- Standalone DC/DC Synchronous Buck Mode
- Operates from AC or DC Input up to 42V
- Wide 4.5V to 30V Bias Supply Range
- Wide 0.75V to 13.5V Output Range.
- Top and Bottom Gate Drivers Sink 2.5A Peak
- Adaptive Gate Driver Dead-time Control
- Wide Bandwidth Error Amplifier (4MHz)
- Programmable Soft-start
- Thermal Shutdown Protection
- TSSOP-16 package
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The LM25115A controller contains all of the features necessary to produce multiple tracking outputs using the Secondary Side Post Regulation (SSPR) technique. The SSPR technique develops a highly efficient and well regulated auxiliary output from the secondary side switching waveform of an isolated power converter. LM25115A can be also used as a standalone DC/DC synchronous buck controller (Refer to section). Regulation of the auxiliary output voltage is achieved by leading edge pulse width modulation (PWM) of the main channel duty cycle. Leading edge modulation is compatible with either current mode or voltage mode control of the main output. The LM25115A drives external high-side and low-side NMOS power switches configured as a synchronous buck regulator. A current sense amplifier provides overload protection and operates over a wide common mode input range. Additional features include a low dropout (LDO) bias regulator, error amplifier, precision reference, adaptive dead time control of the gate signals and thermal shutdown.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | Secondary Side Post Regulator/DC-DC Converter with Power-Up/Pwr-Down Trac datasheet (Rev. B) | 2013年 4月 1日 | |
| Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 | ||
| Analog Design Journal | Reduce buck-converter EMI and voltage stress by minimizing inductive parasitics | 2016年 7月 21日 | ||
| EVM User's guide | AN-1368 LM5115/5025A Evaluation Board (Rev. A) | 2013年 4月 26日 | ||
| EVM User's guide | AN-1367 LM5115 HV DC Evaluation Board (Rev. B) | 2013年 4月 24日 | ||
| EVM User's guide | AN-1542 LM5115A Evaluation Board (Rev. B) | 2013年 4月 24日 | ||
| Application note | Minimizing FET Losses For a High Input Rail Buck Converter (Rev. A) | 2013年 4月 23日 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TSSOP (PW) | 16 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點