LMK1D1204

Name: LMK1D1204
Brand: TI
SKU: LMK1D1204
Price: 3.638 USD

現行

4 通道輸出 LVDS 1.8-V 緩衝器

立即訂購

產品規格表

document-pdfAcrobat LMK1D120x Low Additive Jitter LVDS Buffer datasheet (Rev. B) (英文) PDF | HTML

LMK1D1204

現行

產品規格表

立即訂購

產品詳細資料

Number of outputs

4

Additive RMS jitter (typ) (fs)

50

Core supply voltage (V)

1.8, 2.5, 3.3

Output supply voltage (V)

1.8, 2.5, 3.3

Output skew (ps)

20

Operating temperature range (°C)

-40 to 105

Rating

Catalog

Output type

LVDS

Input type

HCSL, LP-HCSL, LVCMOS, LVDS, LVPECL

Number of outputs

4

Additive RMS jitter (typ) (fs)

50

Core supply voltage (V)

1.8, 2.5, 3.3

Output supply voltage (V)

1.8, 2.5, 3.3

Output skew (ps)

20

Operating temperature range (°C)

-40 to 105

Rating

Catalog

Output type

LVDS

Input type

HCSL, LP-HCSL, LVCMOS, LVDS, LVPECL

VQFN (RGT)

16

9 mm² 3 x 3

High-performance LVDS clock buffer family with 2 inputs and 4 (2:4) or 8 (2:8) outputs.
Output frequency up to 2 GHz.
Supply voltage: 1.71 V to 3.465 V
Low additive jitter: < maximum 60 fs RMS in 12-kHz to 20-MHz at 156.25 MHz
- Very low phase noise floor: –164 dBc/Hz (typical)
Very low propagation delay: < 575 ps maximum
Output skew: 20 ps maximum
Universal inputs accept LVDS, LVPECL, LVCMOS, LP-HCSL, HCSL and CML inputs
LVDS reference voltage, V AC_REF, available for capacitive-coupled inputs
Industrial temperature range: –40°C to 105°C
Packages available:
- LMK1D1204: 3-mm × 3-mm, 16-pin VQFN (RGT)
- LMK1D1208: 5-mm × 5-mm, 28-pin VQFN (RHD)

High-performance LVDS clock buffer family with 2 inputs and 4 (2:4) or 8 (2:8) outputs.
Output frequency up to 2 GHz.
Supply voltage: 1.71 V to 3.465 V
Low additive jitter: < maximum 60 fs RMS in 12-kHz to 20-MHz at 156.25 MHz
- Very low phase noise floor: –164 dBc/Hz (typical)
Very low propagation delay: < 575 ps maximum
Output skew: 20 ps maximum
Universal inputs accept LVDS, LVPECL, LVCMOS, LP-HCSL, HCSL and CML inputs
LVDS reference voltage, V AC_REF, available for capacitive-coupled inputs
Industrial temperature range: –40°C to 105°C
Packages available:
- LMK1D1204: 3-mm × 3-mm, 16-pin VQFN (RGT)
- LMK1D1208: 5-mm × 5-mm, 28-pin VQFN (RHD)

The LMK1D120x clock buffer distributes one of two selectable clock inputs (IN0 and IN1) to 4 or 8 pairs of differential LVDS clock outputs (OUT0 through OUT7) with minimum skew for clock distribution. The LMK1D12x family can accept two clock sources into an input multiplexer. The inputs can either be LVDS, LVPECL, LP-HCSL, HCSL, CML or LVCMOS.

The LMK1D12x is specifically designed for driving 50-Ω transmission lines. In case of driving the inputs in single-ended mode, the appropriate bias voltage as shown in must be applied to the unused negative input pin.

The IN_SEL pin selects the input which is routed to the outputs. If this pin is left open, it disables the outputs (logic low). The part supports a fail-safe function. The device further incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal.

The device operates in 1.8-V or 2.5-V or 3.3-V supply environment and is characterized from –40°C to 105°C (ambient temperature). The LMK1D12x package variant is shown in the table below:

The LMK1D120x clock buffer distributes one of two selectable clock inputs (IN0 and IN1) to 4 or 8 pairs of differential LVDS clock outputs (OUT0 through OUT7) with minimum skew for clock distribution. The LMK1D12x family can accept two clock sources into an input multiplexer. The inputs can either be LVDS, LVPECL, LP-HCSL, HCSL, CML or LVCMOS.

The LMK1D12x is specifically designed for driving 50-Ω transmission lines. In case of driving the inputs in single-ended mode, the appropriate bias voltage as shown in must be applied to the unused negative input pin.

The IN_SEL pin selects the input which is routed to the outputs. If this pin is left open, it disables the outputs (logic low). The part supports a fail-safe function. The device further incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal.

The device operates in 1.8-V or 2.5-V or 3.3-V supply environment and is characterized from –40°C to 105°C (ambient temperature). The LMK1D12x package variant is shown in the table below:

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重要文件	類型	標題	格式選項	日期
*	Data sheet	LMK1D120x Low Additive Jitter LVDS Buffer datasheet (Rev. B)	PDF \| HTML	2023年 6月 14日
	Application note	Sine to Square Wave Conversion Using Clock Buffers	PDF \| HTML	2024年 9月 3日

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LMK1D1208 是具有兩個差分輸入和八個 LVDS 輸出的高性能、低附加抖動 LVDS 時鐘緩衝器。此評估模組 (EVM) 旨在示範 LMK1D1208 的電氣性能。此 EVM 還可以用於評估位於 LMK1Dxxxx 系列內的其他 28 針腳裝置。LMK1D1208EVM 配備 50-Ω SMA 連接器和阻抗控制的 50-Ω 微帶傳輸線，以提供最佳性能。

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VQFN (RGT)	16	Ultra Librarian

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LMK1D1204

4 通道輸出 LVDS 1.8-V 緩衝器

LMK1D1204

產品詳細資料

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