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Arm 式處理器

OMAP5912

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OMAP5912

現行
產品規格表 立即訂購

產品詳細資料

Arm CPU 1 Arm9 Arm (max) (MHz) 192 Coprocessors C55x DSP CPU 32-bit Hardware accelerators Image/Video Extension Operating system Linux, RTOS Security Cryptography, Device identity, Memory protection Rating Catalog Operating temperature range (°C) -40 to 85
Arm CPU 1 Arm9 Arm (max) (MHz) 192 Coprocessors C55x DSP CPU 32-bit Hardware accelerators Image/Video Extension Operating system Linux, RTOS Security Cryptography, Device identity, Memory protection Rating Catalog Operating temperature range (°C) -40 to 85
BGA (ZDY) 289 361 mm² 19 x 19 NFBGA (ZVL) 289 144 mm² 12 x 12
  • Low-Power, High-Performance CMOS Technology
    • 0.13-µm Technology
    • 192-MHz Maximum Frequency
    • 1.6 ± 5% V Core Voltage
  • ARM926EJ-S™ (MPU) Core
    • Support for 32-Bit and 16-Bit (Thumb® Mode) Instruction Sets
    • 16K-Byte Instruction Cache
    • 8K-Byte Data Cache
    • Data and Program Memory Management Unit (MMU)
    • 17-Word Write Buffer
    • Two 64-Entry Translation Look-Aside Buffers (TLBs) for MMUs
  • TMS320C55x™ (C55x™) DSP Core
    • One/Two Instructions Executed per Cycle
    • Dual Multipliers (Two Multiply-Accumulates per Cycle)
    • Two Arithmetic/Logic Units
    • Five Internal Data/Operand Buses (3 Read Buses and 2 Write Buses)
    • 32K x 16-Bit On-Chip Dual-Access RAM (DARAM) (64K Bytes)
    • 48K x 16-Bit On-Chip Single-Access RAM (SARAM) (96K Bytes)
    • Instruction Cache (24K Bytes)
    • Video Hardware Accelerators for DCT, iDCT, Pixel Interpolation, and Motion Estimation for Video Compression
  • 250K Bytes of Shared Internal SRAM
  • Memory Traffic Controller (TC)
    • 16-Bit EMIFS Supports up to 256M Bytes of External Memory (i.e., Async. ROM/RAM, NOR/NAND Flash, and Sync. Burst Flash)
    • 16-Bit EMIFF to Access up to 64M Bytes of SDRAM, Mobile SDRAM, or Mobile DDR
  • DSP Memory Management Unit
  • DSP Peripherals
    • Three 32-Bit Timers and Watchdog Timer
    • Six-Channel DMA Controller
    • Two Multichannel Buffered Serial Ports
    • Two Multichannel Serial Interfaces
  • MPU Peripherals
    • Three 32-Bit Timers and Watchdog Timer
    • USB 1.1 Host and Client Controllers
    • USB On-the-Go (OTG) Controller
    • 3 USB Ports, One With an Integrated Transceiver
    • Camera Interface for Parallel CMOS Sensors
    • Real-Time Clock (RTC)
    • Pulse-Width Tone (PWT) Interface
    • Pulse-Width Light (PWL) Interface
    • Keyboard Matrix Interface (6 x 5 or 8 x 8)
    • HDQ/1-Wire® Interface
    • Multimedia Card (MMC) and Secure Digital (SD) Interface
    • Up to 16 MPU General-Purpose I/Os
    • Two LED Pulse Generators (LPGs)
    • ETM9™ Trace Module for ARM926EJ-S Debug
    • 16-/18-Bit LCD Controller With Dedicated System DMA Channel
    • 32-kHz Operating System (OS) Timer
  • Shared Peripherals
    • 8 General-Purpose Timers
    • Serial Port Interface (SPI)
    • Three Universal Asynchronous Receiver/Transmitters (UARTs) (Two Supporting SIR mode for IrDA)
    • Inter-Integrated Circuit (I2C) Master and Slave Interface
    • Multimedia Card (MMC) and Secure Digital (SD) Interface
    • Multichannel Buffered Serial Port
    • Up to 64 Shared General-Purpose I/Os
    • 32-kHz Synchro Counter
  • Endian Conversion Unit
  • Hardware Accelerators for Cryptographic Functions
    • Random Number Generation
    • DES and 3DES
    • SHA-1 and MD5
  • Individual Power-Saving Modes for MPU/DSP/TC
  • On-Chip Scan-Based Emulation Logic
  • IEEE Std 1149.1 (JTAG) Boundary Scan Logic
  • Three 289-Ball BGA (Ball Grid Array) Packages (ZDY and ZZG - Lead-Free; GDY - With Lead)
  • The OMAP5912 device is targeted at the following applications:
    • Applications Processing Devices
    • Mobile Communications
      • WAN 802.11X
      • Bluetooth™
      • GSM, GPRS, EDGE
      • CDMA
    • Video and Image Processing (MPEG4, JPEG, Windows® Media Video, etc.)
    • Advanced Speech Applications (text-to-speech, speech recognition)
    • Audio Processing (MPEG-1 Audio Layer3 [MP3], AMR, WMA, AAC, and Other GSM Speech Codecs)
    • Graphics and Video Acceleration
    • Generalized Web Access
    • Data Processing

IEEE Standard 1149.1-1990 Standard Test-Access Port and Boundary Scan Architecture.


TMS320C55x, C55x, OMAP, and DSP/BIOS are trademarks of Texas Instruments.
ARM926EJ-S and ETM9 are trademarks of ARM Limited in the EU and other countries.
Thumb and ARM are registered trademarks of ARM Limited in the EU and other countries.
1-Wire is a registered trademark of Dallas Semiconductor Corporation.
Bluetooth is a trademark owned by Bluetooth SIG, Inc.
Windows is a registered trademark of Microsoft Corporation in the United States and/or other countries.
  • Low-Power, High-Performance CMOS Technology
    • 0.13-µm Technology
    • 192-MHz Maximum Frequency
    • 1.6 ± 5% V Core Voltage
  • ARM926EJ-S™ (MPU) Core
    • Support for 32-Bit and 16-Bit (Thumb® Mode) Instruction Sets
    • 16K-Byte Instruction Cache
    • 8K-Byte Data Cache
    • Data and Program Memory Management Unit (MMU)
    • 17-Word Write Buffer
    • Two 64-Entry Translation Look-Aside Buffers (TLBs) for MMUs
  • TMS320C55x™ (C55x™) DSP Core
    • One/Two Instructions Executed per Cycle
    • Dual Multipliers (Two Multiply-Accumulates per Cycle)
    • Two Arithmetic/Logic Units
    • Five Internal Data/Operand Buses (3 Read Buses and 2 Write Buses)
    • 32K x 16-Bit On-Chip Dual-Access RAM (DARAM) (64K Bytes)
    • 48K x 16-Bit On-Chip Single-Access RAM (SARAM) (96K Bytes)
    • Instruction Cache (24K Bytes)
    • Video Hardware Accelerators for DCT, iDCT, Pixel Interpolation, and Motion Estimation for Video Compression
  • 250K Bytes of Shared Internal SRAM
  • Memory Traffic Controller (TC)
    • 16-Bit EMIFS Supports up to 256M Bytes of External Memory (i.e., Async. ROM/RAM, NOR/NAND Flash, and Sync. Burst Flash)
    • 16-Bit EMIFF to Access up to 64M Bytes of SDRAM, Mobile SDRAM, or Mobile DDR
  • DSP Memory Management Unit
  • DSP Peripherals
    • Three 32-Bit Timers and Watchdog Timer
    • Six-Channel DMA Controller
    • Two Multichannel Buffered Serial Ports
    • Two Multichannel Serial Interfaces
  • MPU Peripherals
    • Three 32-Bit Timers and Watchdog Timer
    • USB 1.1 Host and Client Controllers
    • USB On-the-Go (OTG) Controller
    • 3 USB Ports, One With an Integrated Transceiver
    • Camera Interface for Parallel CMOS Sensors
    • Real-Time Clock (RTC)
    • Pulse-Width Tone (PWT) Interface
    • Pulse-Width Light (PWL) Interface
    • Keyboard Matrix Interface (6 x 5 or 8 x 8)
    • HDQ/1-Wire® Interface
    • Multimedia Card (MMC) and Secure Digital (SD) Interface
    • Up to 16 MPU General-Purpose I/Os
    • Two LED Pulse Generators (LPGs)
    • ETM9™ Trace Module for ARM926EJ-S Debug
    • 16-/18-Bit LCD Controller With Dedicated System DMA Channel
    • 32-kHz Operating System (OS) Timer
  • Shared Peripherals
    • 8 General-Purpose Timers
    • Serial Port Interface (SPI)
    • Three Universal Asynchronous Receiver/Transmitters (UARTs) (Two Supporting SIR mode for IrDA)
    • Inter-Integrated Circuit (I2C) Master and Slave Interface
    • Multimedia Card (MMC) and Secure Digital (SD) Interface
    • Multichannel Buffered Serial Port
    • Up to 64 Shared General-Purpose I/Os
    • 32-kHz Synchro Counter
  • Endian Conversion Unit
  • Hardware Accelerators for Cryptographic Functions
    • Random Number Generation
    • DES and 3DES
    • SHA-1 and MD5
  • Individual Power-Saving Modes for MPU/DSP/TC
  • On-Chip Scan-Based Emulation Logic
  • IEEE Std 1149.1 (JTAG) Boundary Scan Logic
  • Three 289-Ball BGA (Ball Grid Array) Packages (ZDY and ZZG - Lead-Free; GDY - With Lead)
  • The OMAP5912 device is targeted at the following applications:
    • Applications Processing Devices
    • Mobile Communications
      • WAN 802.11X
      • Bluetooth™
      • GSM, GPRS, EDGE
      • CDMA
    • Video and Image Processing (MPEG4, JPEG, Windows® Media Video, etc.)
    • Advanced Speech Applications (text-to-speech, speech recognition)
    • Audio Processing (MPEG-1 Audio Layer3 [MP3], AMR, WMA, AAC, and Other GSM Speech Codecs)
    • Graphics and Video Acceleration
    • Generalized Web Access
    • Data Processing

IEEE Standard 1149.1-1990 Standard Test-Access Port and Boundary Scan Architecture.


TMS320C55x, C55x, OMAP, and DSP/BIOS are trademarks of Texas Instruments.
ARM926EJ-S and ETM9 are trademarks of ARM Limited in the EU and other countries.
Thumb and ARM are registered trademarks of ARM Limited in the EU and other countries.
1-Wire is a registered trademark of Dallas Semiconductor Corporation.
Bluetooth is a trademark owned by Bluetooth SIG, Inc.
Windows is a registered trademark of Microsoft Corporation in the United States and/or other countries.

OMAP5912 is a highly integrated hardware and software platform, designed to meet the application processing needs of next-generation embedded devices.

The OMAP™ platform enables OEMs and ODMs to quickly bring to market devices featuring rich user interfaces, high processing performance, and long battery life through the maximum flexibility of a fully integrated mixed processor solution.

The dual-core architecture provides benefits of both DSP and reduced instruction set computer (RISC)technologies, incorporating a TMS320C55x DSP core and a high-performance ARM926EJ-S ARM® core.

OMAP5912 is a highly integrated hardware and software platform, designed to meet the application processing needs of next-generation embedded devices.

The OMAP™ platform enables OEMs and ODMs to quickly bring to market devices featuring rich user interfaces, high processing performance, and long battery life through the maximum flexibility of a fully integrated mixed processor solution.

The dual-core architecture provides benefits of both DSP and reduced instruction set computer (RISC)technologies, incorporating a TMS320C55x DSP core and a high-performance ARM926EJ-S ARM® core.
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類型 標題 日期
* Data sheet OMAP5912 Applications Processor datasheet (Rev. E) 2005年 12月 19日
* Errata OMAP5912 Applications Processor Silicon Errata (Rev. K) 2007年 12月 14日
* Errata OMAP59xx MicroStar BGA Discontinued and Redesigned 2022年 5月 10日
* User guide OMAP5912 Technical Reference Guide 2011年 9月 15日
Application note High-Speed Interface Layout Guidelines (Rev. J) PDF | HTML 2023年 2月 24日
Analog Design Journal Enabling high-speed USB OTG functionality on TI DSPs 2007年 5月 18日
User guide OMAP5912 Multimedia Processor OMAP3.2 Subsystem Reference Guide (Rev. B) 2006年 4月 24日
User guide OMAP5912 Multimedia Processor Device Overview and Architecture Reference Guide (Rev. C) 2006年 2月 23日
User guide OMAP5912 Multimedia Processor Initialization Reference Guide (Rev. C) 2006年 2月 23日
User guide OMAP5912 Multimedia Processor Serial Interfaces Reference Guide (Rev. C) 2006年 2月 23日
User guide OMAP5912 Multimedia Processor Memory Interfaces Reference Guide (Rev. C) 2006年 1月 24日
User guide OMAP5912 Multimedia Processor Camera Interface Reference Guide (Rev. C) 2005年 11月 23日
User guide OMAP5910/5912 Multimedia Processor DSP Subsystem Reference Guide (Rev. A) 2005年 5月 17日
User guide OMAP5912 Multimedia Processor Direct Memory Access (DMA) Support Reference Guide (Rev. C) 2005年 3月 28日
Application note OMAP591x: Tuning the System Memory Requirements of DSP/BIOS Link 2005年 3月 16日
User guide OMAP5912 Multimedia Processor Multichannel Buffered Serial Ports (McBSPs) RG (Rev. C) 2005年 3月 10日
Application note DSP Instruction Cache Performance on the OMAP5912 2005年 2月 28日
User guide TMS320C55x DSP CPU Programmer's Reference Supplement (Rev. G) 2005年 2月 24日
User guide OMAP5910/5912 Applications Processor Timers Reference Guide 2005年 2月 22日
Application note Using the CSL to complement OS dispatcher in handling Cascaded Interrupts 2004年 11月 8日
User guide OSK5912 Board Design Guide 2004年 10月 25日
User guide OMAP5912 Multimedia Processor Display Interface Reference Guide (Rev. B) 2004年 10月 14日
User guide OMAP5912 Multimedia Processor Interrupts Reference Guide (Rev. B) 2004年 10月 14日
User guide OMAP5912 Multimedia Processor Timers Reference Guide (Rev. B) 2004年 10月 14日
Application note Programming the DSP MMU in the OMAP5910 Device 2004年 10月 7日
Product overview OMAP5912 Product Bulletin 2004年 4月 5日
User guide OMAP5912 Multimedia Processor Clocks Reference Guide (Rev. A) 2004年 3月 31日
User guide OMAP5912 Multimedia Processor General-Purpose Interface Reference Guide (Rev. A) 2004年 3月 31日
User guide OMAP5912 Multimedia Processor Keyboard Interface Reference Guide (Rev. A) 2004年 3月 31日
User guide OMAP5912 Multimedia Processor Multimedia Card (MMC/SD/SDIO) Interface Reference (Rev. A) 2004年 3月 31日
User guide OMAP5912 Multimedia Processor Peripheral Interconnects Reference Guide (Rev. A) 2004年 3月 31日
User guide OMAP5912 Multimedia Processor Power Management Reference Guide (Rev. A) 2004年 3月 31日
User guide OMAP5912 Multimedia Processor Real-Time and Split Power Reference Guide (Rev. A) 2004年 3月 31日
User guide OMAP5912 Multimedia Processor Universal Serial Bus (USB) Reference Guide (Rev. A) 2004年 3月 31日

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Arm 式處理器
OMAP5912 — 應用處理器
數位訊號處理器 (DSP)
SM320VC5507-EP — 強化型產品低功耗 C5507 定點 DSP TMS320VC5501 — 低功耗 C55x 定點 DSP - 高達 300MHz TMS320VC5502 — 定點數位訊號處理器 TMS320VC5503 — 低功耗 C55x 定點 DSP - 高達 200MHz TMS320VC5505 — 低功耗 C55x 定點 DSP - 高達 100MHz、USB、LCD 介面、FFT HWA、SAR ADC TMS320VC5506 — 低功耗 C55x 定點 DSP - 108MHz TMS320VC5507 — 定點數位訊號處理器 TMS320VC5509A — 定點數位訊號處理器 TMS320VC5510A — 定點數位訊號處理器
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