SN74ABTE16246
- Member of the Texas Instruments Widebus™ Family
- Supports the VME64 ETL Specification
- Reduced TTL-Compatible Input Threshold Range
- High-Drive Outputs (IOH = –60 mA, IOL = 90 mA) Support Equivalent 25-
Incident-Wave Switching - VCC BIAS Pin Minimizes Signal Distortion During Live Insertion
- Internal Pullup Resistor on OE\ Keeps Outputs in High-Impedance State During Power Up or Power Down
- Distributed VCC and GND Pins Minimize High-Speed Switching Noise
- Equivalent 25- Series Damping Resistor on B Port
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Widebus is a trademark of Texas Instruments.
The SN74ABTE16246 is an 11-bit noninverting transceiver designed for asynchronous two-way communication between buses. This device has open-collector and 3-state outputs. The device allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so that the buses are effectively isolated. When OE\ is low, the device is active.
The B port has an equivalent 25- series output resistor to reduce ringing. Active bus-hold inputs on the B port hold unused or floating inputs at a valid logic level.
The A port provides for the precharging of the outputs via VCCBIAS, which establishes a voltage between 1.3 V and 1.7 V when VCC is not connected.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
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技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | SN74ABTE16246 datasheet (Rev. J) | 2003年 8月 6日 | |
| Selection guide | Logic Guide (Rev. AB) | 2017年 6月 12日 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015年 12月 2日 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 2007年 1月 16日 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 | ||
| Application note | TI IBIS File Creation, Validation, and Distribution Processes | 2002年 8月 29日 | ||
| Selection guide | Advanced Bus Interface Logic Selection Guide | 2001年 1月 9日 | ||
| Application note | Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A) | 1996年 12月 1日 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SSOP (DL) | 48 | Ultra Librarian |
| TSSOP (DGG) | 48 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點