產品詳細資料

Bits (#) 2 Data rate (max) (Mbps) 380 Topology Push-Pull Direction control (typ) Direction-controlled Vin (min) (V) 0.65 Vin (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Applications GPIO Features Output enable, Partial power down (Ioff), Vcc isolation Prop delay (ns) 4 Technology family AXC Supply current (max) (mA) 0.023 Rating Automotive Operating temperature range (°C) -40 to 125
Bits (#) 2 Data rate (max) (Mbps) 380 Topology Push-Pull Direction control (typ) Direction-controlled Vin (min) (V) 0.65 Vin (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Applications GPIO Features Output enable, Partial power down (Ioff), Vcc isolation Prop delay (ns) 4 Technology family AXC Supply current (max) (mA) 0.023 Rating Automotive Operating temperature range (°C) -40 to 125
VSSOP (DCU) 8 6.2 mm² 2 x 3.1
  • AEC-Q100 automotive qualified
  • Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65V to 3.6V
  • Operating temperature from –40°C to +125°C
  • Glitch-free power supply sequencing
  • Up to 380Mbps support when translating from 1.8V to 3.3V
  • VCC isolation feature
    • If either VCC input is below 100mV, all I/Os outputs are disabled and become high-impedance
  • Ioff supports partial-power-down mode operation
  • Compatible with AVC family level shifters
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 8000-V human-body model
    • 1000-V charged-device model
  • AEC-Q100 automotive qualified
  • Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65V to 3.6V
  • Operating temperature from –40°C to +125°C
  • Glitch-free power supply sequencing
  • Up to 380Mbps support when translating from 1.8V to 3.3V
  • VCC isolation feature
    • If either VCC input is below 100mV, all I/Os outputs are disabled and become high-impedance
  • Ioff supports partial-power-down mode operation
  • Compatible with AVC family level shifters
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 8000-V human-body model
    • 1000-V charged-device model

The SN74AXC2T45-Q1 is a two-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65V to 3.6V. Additionally the SN74AXC2T45-Q1 is compatible with a single-supply system.

The SN74AXC2T45-Q1 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control input (DIR). The SN74AXC2T45-Q1 device is designed so the control pin (DIR) is referenced to VCCA.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry is designed so that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature is designed so that if either VCCA or VCCB is less than 100mV, both I/O ports enter a high-impedance state by disabling their outputs.

Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.

The SN74AXC2T45-Q1 is a two-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65V to 3.6V. Additionally the SN74AXC2T45-Q1 is compatible with a single-supply system.

The SN74AXC2T45-Q1 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control input (DIR). The SN74AXC2T45-Q1 device is designed so the control pin (DIR) is referenced to VCCA.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry is designed so that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature is designed so that if either VCCA or VCCB is less than 100mV, both I/O ports enter a high-impedance state by disabling their outputs.

Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.

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類型 標題 日期
* Data sheet SN74AXC2T45-Q1 Automotive 2-Bit Translating Transceiver with Configurable Level-Shifting datasheet (Rev. B) PDF | HTML 2024年 1月 30日
Application note Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators PDF | HTML 2024年 10月 2日
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024年 7月 12日
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024年 7月 3日
Functional safety information SN74AXC2T45-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA PDF | HTML 2024年 3月 13日
Application note Translate Voltages for GPIO PDF | HTML 2020年 8月 4日

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AVCLVCDIRCNTRL-EVM — 適用於方向控制雙向轉換裝置、支援 AVC 和 LVC 的通用 EVM

通用 EVM 的設計可支援一、二、四、八通道 LVC 及 AVC 方向控制的轉換裝置。此外也支援相同通道數量的匯流排保留與汽車 -Q1 裝置。AVC 是低電壓轉換裝置,具較低驅動強度 12mA。LVC 是較高的電壓轉換裝置,範圍從 1.65 到 5.5V 且具較高驅動強度 32mA。

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