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交換器與多工器
類比交換器與多工器
通訊協定與匯流排開關與多工器

SN74CB3Q3125

現行

3.3-V、1:1 (SPST)、4 通道 FET 匯流排開關

立即訂購
產品規格表

SN74CB3Q3125

現行
產品規格表 立即訂購

產品詳細資料

Protocols Analog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART Configuration 1:1 SPST Number of channels 4 Bandwidth (MHz) 500 Supply voltage (max) (V) 3.6 Ron (typ) (mΩ) 4000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Supply current (typ) (µA) 2000 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 64 COFF (typ) (pF) 4 CON (typ) (pF) 8 OFF-state leakage current (max) (µA) 1 Ron (max) (mΩ) 9000 Turnoff time (disable) (max) (ns) 5.3 Turnon time (enable) (max) (ns) 6.6 VIH (min) (V) 1.7 VIL (max) (V) 0.8 Rating Catalog
Protocols Analog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART Configuration 1:1 SPST Number of channels 4 Bandwidth (MHz) 500 Supply voltage (max) (V) 3.6 Ron (typ) (mΩ) 4000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Supply current (typ) (µA) 2000 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 64 COFF (typ) (pF) 4 CON (typ) (pF) 8 OFF-state leakage current (max) (µA) 1 Ron (max) (mΩ) 9000 Turnoff time (disable) (max) (ns) 5.3 Turnon time (enable) (max) (ns) 6.6 VIH (min) (V) 1.7 VIL (max) (V) 0.8 Rating Catalog
SSOP (DBQ) 16 29.4 mm² 4.9 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4 TVSOP (DGV) 14 23.04 mm² 3.6 x 6.4 VQFN (RGY) 14 12.25 mm² 3.5 x 3.5
  • High-Bandwidth Data Path (up to 500 MHz(1))
  • 5-V Tolerant I/Os With Device Powered Up
    or Powered Down
  • Low and Flat ON-State Resistance (ron)
    Characteristics Over Operating Range
    (ron = 3 Ω Typ)
  • Rail-to-Rail Switching on Data I/O Ports
    • 0-V to 5-V Switching With 3.3-V VCC
    • 0-V to 3.3-V Switching With 2.5-V VCC
  • Bidirectional Data Flow With Near-Zero
    Propagation Delay
  • Low Input and Output Capacitance Minimizes
    Loading and Signal Distortion
    (Cio(OFF) = 4 pF Typ)
  • Fast Switching Frequency (fOE = 20 MHz Max)
  • Data and Control Inputs Provide Undershoot
    Clamp Diodes
  • Low Power Consumption
    (ICC = 0.3 mA Typ)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0-V to 5-V Signaling Levels
    (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
  • Control Inputs Can Be Driven by TTL,
    5-V, or 3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications:
    USB Interface, Differential Signal Interface, Bus
    Isolation, Low-Distortion Signal Gating
  • High-Bandwidth Data Path (up to 500 MHz(1))
  • 5-V Tolerant I/Os With Device Powered Up
    or Powered Down
  • Low and Flat ON-State Resistance (ron)
    Characteristics Over Operating Range
    (ron = 3 Ω Typ)
  • Rail-to-Rail Switching on Data I/O Ports
    • 0-V to 5-V Switching With 3.3-V VCC
    • 0-V to 3.3-V Switching With 2.5-V VCC
  • Bidirectional Data Flow With Near-Zero
    Propagation Delay
  • Low Input and Output Capacitance Minimizes
    Loading and Signal Distortion
    (Cio(OFF) = 4 pF Typ)
  • Fast Switching Frequency (fOE = 20 MHz Max)
  • Data and Control Inputs Provide Undershoot
    Clamp Diodes
  • Low Power Consumption
    (ICC = 0.3 mA Typ)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0-V to 5-V Signaling Levels
    (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
  • Control Inputs Can Be Driven by TTL,
    5-V, or 3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications:
    USB Interface, Differential Signal Interface, Bus
    Isolation, Low-Distortion Signal Gating

The SN74CB3Q3125 device is a high-bandwidth FET bus switch that uses a charge pump to elevate the gate voltage of the pass transistor, thus providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The SN74CB3Q3125 device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus.

The SN74CB3Q3125 device is a high-bandwidth FET bus switch that uses a charge pump to elevate the gate voltage of the pass transistor, thus providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The SN74CB3Q3125 device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus.
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類型 標題 日期
* Data sheet SN74CB3Q3125 Quadruple FET Bus Switch 2.5-V/3.3-V Low-Voltage, High-Bandwidth Bus Switch datasheet (Rev. C) PDF | HTML 2015年 6月 29日
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022年 6月 2日
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021年 12月 1日
Application note CBT-C, CB3T, and CB3Q Signal-Switch Families (Rev. C) PDF | HTML 2021年 11月 19日
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 2021年 1月 6日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Technical article Logic gates and switches with Ioff or powered-off protection: empowering you to po PDF | HTML 2016年 11月 2日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
More literature Digital Bus Switch Selection Guide (Rev. A) 2004年 11月 10日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
User guide Signal Switch Data Book (Rev. A) 2003年 11月 14日
Application note Bus FET Switch Solutions for Live Insertion Applications 2003年 2月 7日
Selection guide Logic Guide (Rev. AC) PDF | HTML 1994年 6月 1日

設計與開發

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介面轉接器

LEADED-ADAPTER1 — 適用於快速測試 TI 的 5、8、10、16 及 24 針腳引線封裝的表面貼裝至 DIP 接頭適配器

EVM-LEADED1 板可用於快速測試和搭建 TI 常見的有引腳封裝  此電路板具備板上配置，可將 TI 的 D、DBQ、DCT、DCU、DDF、DGS、DGV 和 PW 表面黏著封裝轉換為 100mil DIP 排針。     

使用指南: PDF
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模擬型號

HSPICE MODEL OF SN74CB3Q3125

SCEJ199.ZIP (93 KB) - HSpice Model
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模擬型號

SN74CB3Q3125 IBIS Model (Rev. A)

SCDM067A.ZIP (25 KB) - IBIS Model
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參考設計

TIDA-00180 — 具有可編程輸出電壓和位置編碼器介面保護的電源

This reference design implements a universal power supply with programmable output voltage and innovative smart eFuse technology for use in a multi-standard position encoder interface module on an industrial drive. The eFuse provides inrush-current and over-current protection as well as user (...)
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SSOP (DBQ) 16 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
TVSOP (DGV) 14 Ultra Librarian
VQFN (RGY) 14 Ultra Librarian
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