SN74CB3Q3345
- High-bandwidth datapath (up to 500MHz)
- 5V-tolerant I/Os with device powered up or powered down
- Low and flat ON-state resistance (ron) characteristics over operating range (ron = 4Ω typical)
- Rail-to-rail switching on data
I/O ports
- 0- to 5V switching with 3.3V VCC
- 0- to 3.3V switching with 2.5V VCC
- Bidirectional data flow with near-zero propagation delay
- Low input, output capacitance minimizes loading and signal distortion (Cio(OFF) = 4pF typical)
- Fast switching frequency (f OE = 20MHz maximum)
- Data and control inputs provide undershoot clamp diodes
- Low power consumption (ICC = 0.7mA typical)
- VCC operating range from 2.3V to 3.6V
- Data I/Os support 0- to 5V signaling levels (0.8V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, and 5V)
- Control inputs can be driven by TTL or 5V/3.3V CMOS outputs
- Ioff supports partial-power-down mode operation
- Latch-up performance exceeds 100mA per JESD 78, class II
- ESD performance tested per JESD
22
- 2000V human-body model (A114B, class II)
- 1000V charged-device model (C101)
The SN74CB3Q3345 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3345 provides an optimized interface for broadband communications, networking, and data-intensive computing systems.
The SN74CB3Q3345 is organized as an 8-bit bus switch with two output-enable (OE, OE) inputs. When OE is high or OE is low, the bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is low and OE is high, the bus switch is OFF, and a high-impedance state exists between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when powered down.
The device has isolation during power off. To maintain the high-impedance state during power up or power down, OE must be tied to VCC through a pullup resistor and OE must be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | SN74CB3Q3345 8-Bit FET BUS Switch 2.5V, 3.3V Low-Voltage High-Bandwidth BUS Switch datasheet (Rev. C) | PDF | HTML | 2026/8/21 | ||
| 應用說明 | Selecting the Correct Texas Instruments Signal Switch (Rev. E) | PDF | HTML | 2022/6/2 | |||
| 應用說明 | Multiplexers and Signal Switches Glossary (Rev. B) | PDF | HTML | 2021/12/1 | |||
| Application brief | Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) | PDF | HTML | 2021/1/6 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RGY) | 20 | Ultra Librarian |
| TSSOP (PW) | 20 | Ultra Librarian |
| TVSOP (DGV) | 20 | Ultra Librarian |
| SSOP (DBQ) | 20 | Ultra Librarian |
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