SN74GTL2006

現行

13 位元 GTL-/GTL/GTL+ 至 LVTTL 轉換器

立即訂購

產品規格表

document-pdfAcrobat SN74GTL2006 datasheet (英文)

SN74GTL2006

現行

產品規格表

立即訂購

產品詳細資料

Bits (#)

13

Data rate (max) (Mbps)

100

Topology

Open drain, Push-Pull

Direction control (typ)

Fixed-direction

Vin (min) (V)

3

Vin (max) (V)

3.6

Features

Single supply

Technology family

GTL

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Bits (#)

13

Data rate (max) (Mbps)

100

Topology

Open drain, Push-Pull

Direction control (typ)

Fixed-direction

Vin (min) (V)

3

Vin (max) (V)

3.6

Features

Single supply

Technology family

GTL

Rating

Catalog

Operating temperature range (°C)

-40 to 85

TSSOP (PW)

28

62.08 mm² (9.7 mm × 6.4 mm)

Operates as GTL-/GTL/GTL+ to LVTTL or LVTTL to GTL-/GTL/GTL+ Translator
Series Termination on TTL Outputs of 30
Latch-Up Testing to JEDEC Standard JESD 78 Exceeds 500 mA
ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

All trademarks are the property of their respective owners.

Operates as GTL-/GTL/GTL+ to LVTTL or LVTTL to GTL-/GTL/GTL+ Translator
Series Termination on TTL Outputs of 30
Latch-Up Testing to JEDEC Standard JESD 78 Exceeds 500 mA
ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

All trademarks are the property of their respective owners.

The SN74GTL2006 is a 13-bit translator to interface between the 3.3-V LVTTL chipset I/O and the Xeon™ processor GTL-/GTL/GTL+ I/O. The device is designed for platform health management in dual-processor applications.

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重要文件	類型	標題	格式選項	下載最新的英文版本		日期
*	資料表	SN74GTL2006 datasheet				2004/12/17

SN74GTL2006

13 位元 GTL-/GTL/GTL+ 至 LVTTL 轉換器

SN74GTL2006

產品詳細資料

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