THS6072

現行

低功耗 ADSL 差分接收器

立即訂購

THS6072

現行

立即訂購

產品詳細資料

Number of channels

Architecture

DSL Line Driver

Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V)

Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V)

BW at Acl (MHz)

175

Acl, min spec gain (V/V)

Vn at flatband (typ) (nV√Hz)

Vn at 1 kHz (typ) (nV√Hz)

Iq per channel (typ) (mA)

3.4

Vos (offset voltage at 25°C) (max) (mV)

Rail-to-rail

Rating

Catalog

Operating temperature range (°C)

-40 to 85

CMRR (typ) (dB)

Input bias current (max) (pA)

10000000

Offset drift (typ) (µV/°C)

GBW (typ) (MHz)

175

Iout (typ) (mA)

2nd harmonic (dBc)

3rd harmonic (dBc)

Frequency of harmonic distortion measurement (MHz)

Number of channels

Architecture

DSL Line Driver

Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V)

Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V)

BW at Acl (MHz)

175

Acl, min spec gain (V/V)

Vn at flatband (typ) (nV√Hz)

Vn at 1 kHz (typ) (nV√Hz)

Iq per channel (typ) (mA)

3.4

Vos (offset voltage at 25°C) (max) (mV)

Rail-to-rail

Rating

Catalog

Operating temperature range (°C)

-40 to 85

CMRR (typ) (dB)

Input bias current (max) (pA)

10000000

Offset drift (typ) (µV/°C)

GBW (typ) (MHz)

175

Iout (typ) (mA)

2nd harmonic (dBc)

3rd harmonic (dBc)

Frequency of harmonic distortion measurement (MHz)

14.7 mm² 3 x 4.9

29.4 mm² 4.9 x 6

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THS6222

現行

具有共模緩衝器的差動寬頻 PLC 和 HPLC 線路驅動器 Single port line driver for power line communication and DSL applications

技術文件

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檢視所有 4

類型	標題	日期
E-book	The Signal e-book: A compendium of blog posts on op amp design topics	2017年 3月 28日
Application note	Noise Analysis for High Speed Op Amps (Rev. A)	2005年 1月 17日
Application note	Active Output Impedance for ADSL Line Drivers	2002年 11月 26日
User guide	THS6072 Dual High-Speed Operational Amplifier Evaluation Module	2000年 9月 7日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬型號

THS6072 PSpice Model (Rev. B)

SLOJ030B.ZIP (97 KB) - PSpice Model

下載

模擬型號

THS6072 TINA-TI Reference Design (Rev. B)

SLAC109B.TSC (98 KB) - TINA-TI Reference Design

下載

模擬型號

THS6072 TINA-TI Spice Model (Rev. B)

SLAM038B.ZIP (4 KB) - TINA-TI Spice Model

下載

模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)

要求

模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)

使用指南: PDF

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