VSP2582

停產

適用於 CCD 感測器的 12 位元 36 MSPS 1 通道 AFE

立即訂購

產品規格表

document-pdfAcrobat CCD ANALOG FRONT -END FOR DIGITAL CAMERAS datasheet (Rev. B) (英文)

VSP2582

停產

產品規格表

立即訂購

產品詳細資料

Resolution (Bits)

12

Number of channels

1

Sample rate (Msps)

36

Gain (min) (dB)

-9

Gain (max) (dB)

35

Pd (typ) (mW)

85

Supply voltage (max) (V)

3.3

Operating temperature range (°C)

-25 to 85

Output data format

CMOS Parallel

Rating

Catalog

Resolution (Bits)

12

Number of channels

1

Sample rate (Msps)

36

Gain (min) (dB)

-9

Gain (max) (dB)

35

Pd (typ) (mW)

85

Supply voltage (max) (V)

3.3

Operating temperature range (°C)

-25 to 85

Output data format

CMOS Parallel

Rating

Catalog

VQFN (RHH)

36

36 mm² 6 x 6

VQFNP (RHN)

36

36 mm² 6 x 6

CCD Signal Processing:
- 36-MHz Correlated Double Sampling (CDS)
12-Bit Analog-to-Digital Conversion:
- 36-MHz Conversion Rate
- No Missing Codes Ensured
78-dB Input-referred SNR (at CDS Gain 0 dB)
Programmable Black Level Clamping
Programmable Gain Amp (PGA):
–9 dB to +35 dB, –3 dB to +9 dB
by Analog Front Gain (CDS)
–6 dB to +26 dB by Digital Gain
Portable Operation:
- Low Voltage: 2.7 V to 3.6 V
- Low Power: 85 mW at 3.0 V and 36 MHz,
  1 mW in Standby Mode
QFN-36 Package

All trademarks are the property of their respective owners.

CCD Signal Processing:
- 36-MHz Correlated Double Sampling (CDS)
12-Bit Analog-to-Digital Conversion:
- 36-MHz Conversion Rate
- No Missing Codes Ensured
78-dB Input-referred SNR (at CDS Gain 0 dB)
Programmable Black Level Clamping
Programmable Gain Amp (PGA):
–9 dB to +35 dB, –3 dB to +9 dB
by Analog Front Gain (CDS)
–6 dB to +26 dB by Digital Gain
Portable Operation:
- Low Voltage: 2.7 V to 3.6 V
- Low Power: 85 mW at 3.0 V and 36 MHz,
  1 mW in Standby Mode
QFN-36 Package

All trademarks are the property of their respective owners.

The VSP2582 is a complete mixed-signal processing IC for digital cameras that provides correlated double sampling (CDS) and analog-to-digital conversion (ADC) for the output of charge-coupled device (CCD) array. The CDS extracts video information of the pixels from the CCD signal, and the ADC converts it to a digital signal. For varying illumination conditions, –9 dB to +35 dB very stable gain control is provided. This gain control is linear in dB. Input signal clamping and offset correction of the input CDS are also provided.

Offset correction is performed by an Optical Black (OB) level calibration loop, and held at a calibrated black level clamping for an accurate black level reference. Additionally, the black level is quickly recovered after a gain change.

The VSP2582 is available in a QFN-36 package, and operates from a single +3 V supply. The RHH package features an exposed thermal pad, resulting in substantially improved thermal performance.

The VSP2582 is a complete mixed-signal processing IC for digital cameras that provides correlated double sampling (CDS) and analog-to-digital conversion (ADC) for the output of charge-coupled device (CCD) array. The CDS extracts video information of the pixels from the CCD signal, and the ADC converts it to a digital signal. For varying illumination conditions, –9 dB to +35 dB very stable gain control is provided. This gain control is linear in dB. Input signal clamping and offset correction of the input CDS are also provided.

Offset correction is performed by an Optical Black (OB) level calibration loop, and held at a calibrated black level clamping for an accurate black level reference. Additionally, the black level is quickly recovered after a gain change.

The VSP2582 is available in a QFN-36 package, and operates from a single +3 V supply. The RHH package features an exposed thermal pad, resulting in substantially improved thermal performance.

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	類型	標題		日期
*	Data sheet	CCD ANALOG FRONT -END FOR DIGITAL CAMERAS datasheet (Rev. B)		2011年 6月 23日

VSP2582

適用於 CCD 感測器的 12 位元 36 MSPS 1 通道 AFE

VSP2582

產品詳細資料

技術文件

訂購與品質