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ADC32J45IRGZT ACTIVE

Dual-Channel, 14-Bit, 160-MSPS Analog-to-Digital Converter (ADC)

Inventory:

Pricing


Qty Price (USD)
1-99 57.864
100-249 56.124
250-999 46.727
1,000+ 43.507

Quality information

RoHS Yes
REACH Yes
Lead finish / Ball material NIPDAU
MSL rating / Peak reflow Level-3-260C-168 HR
Quality, reliability
& packaging information info-circle

Information included:

  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
View or download

Export classification

*For reference only

  • US ECCN: 3A991C3

Packaging information

Package | Pins VQFN (RGZ) | 48
Package qty | Carrier: 250 | SMALL T&R
Operating temperature range (°C) -40 to 85
View TI packaging information

Features for the ADC32J45

  • Dual Channel
  • 14-Bit Resolution
  • Single Supply: 1.8 V
  • Flexible Input Clock Buffer with Divide-by-1, -2, -4
  • SNR = 72.2 dBFS, SFDR = 87 dBc at
    fIN = 70 MHz
  • Ultralow Power Consumption:
    • 227 mW/Ch at 160 MSPS
  • Channel Isolation: 105 dB
  • Internal Dither
  • JESD204B Serial Interface:
    • Subclass 0, 1, 2 Compliant up to 3.2 Gbps
    • Supports One Lane per ADC up to 160 MSPS
  • Support for Multichip Synchronization
  • Pin-to-Pin Compatible with 12-Bit Version
    (ADC32J2X)
  • Package: VQFN-48 (7 mm × 7 mm)

Description for the ADC32J45

The ADC32J4x are a high-linearity, ultra-low power, dual-channel, 14-bit, 50-MSPS to 160-MSPS, analog-to-digital converter (ADC) family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. A clock input divider allows more flexibility for system clock architecture design and the SYSREF input enables complete system synchronization. The ADC32J4x family supports JESD204B interface in order to reduce the number of interface lines, thus allowing high system integration density. The JESD204B interface is a serial interface, where the data of each ADC are serialized and output over only one differential pair. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock by 20 to derive the bit clock, which is used to serialize the 14-bit data from each channel. The devices support subclass 1 with interface speeds up to 3.2 Gbps.

Inventory:

Pricing


Qty Price (USD)
1-99 57.864
100-249 56.124
250-999 46.727
1,000+ 43.507

Carrier options

You can choose different carrier options based on the quantity of parts, including full reel, custom reel, cut tape, tube or tray.

custom reel is a continuous length of cut tape from one reel to maintain lot- and date-code traceability, built to the exact quantity requested. Following industry standards, a brass shim connects an 18-inch leader and trailer on both sides of the cut tape for direct feeding into automated assembly machines. TI includes a reeling fee for custom reel orders.

Cut tape is a length of tape cut from a reel. TI may fulfill orders using multiple strips of cut tapes or boxes to satisfy the quantity requested.

TI often ships  tube or tray  devices inside a box or in the tube or tray, depending on inventory availability. We pack all tapes, tubes or sample boxes according to internal electrostatic discharge and moisture-sensitivity-level protection requirements.

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Lot and date code selection may be available

Add a quantity to your cart and begin the checkout process to view the options available to select lot or date codes from existing inventory.

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