ADS8900B

VQFN (RGE)

16 mm² 4 x 4

Resolution: 20-Bits
High Sample Rate With No Latency Output:
- ADS8900B: 1-MSPS
- ADS8902B: 500-kSPS
- ADS8904B: 250-kSPS
Integrated LDO Enables Low-Power, Single-Supply Operation
Low Power Reference Buffer with No Droop
Excellent AC and DC Performance:
- SNR: 104.5-dB, THD: –125-dB
- DNL: ±0.2-ppm, 20-Bit No-Missing-Codes
- INL: ±1-ppm
Wide Input Range:
- Unipolar Differential Input Range: ±V_REF
- V_REF Input Range: 2.5-V to 5-V
Enhanced-SPI Digital Interface
- Interface SCLK : 22-MHz at 1-MSPS.
- Configurable Data Parity Output.
Extended Temperature Range: –40°C to +125°C
Small Footprint: 4-mm × 4-mm VQFN

Resolution: 20-Bits
High Sample Rate With No Latency Output:
- ADS8900B: 1-MSPS
- ADS8902B: 500-kSPS
- ADS8904B: 250-kSPS
Integrated LDO Enables Low-Power, Single-Supply Operation
Low Power Reference Buffer with No Droop
Excellent AC and DC Performance:
- SNR: 104.5-dB, THD: –125-dB
- DNL: ±0.2-ppm, 20-Bit No-Missing-Codes
- INL: ±1-ppm
Wide Input Range:
- Unipolar Differential Input Range: ±V_REF
- V_REF Input Range: 2.5-V to 5-V
Enhanced-SPI Digital Interface
- Interface SCLK : 22-MHz at 1-MSPS.
- Configurable Data Parity Output.
Extended Temperature Range: –40°C to +125°C
Small Footprint: 4-mm × 4-mm VQFN

The ADS8900B, ADS8902B, and ADS8904B (ADS890xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 20-bit successive-approximation-register (SAR) analog-to-digital converters (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS891xB (18-bit) and ADS892xB (16-bit) resolution variants.

The ADS89xxB boosts analog performance while maintaining high-resolution data transfer by using TI’s Enhanced-SPI feature. Enhanced-SPI enables ADS89xxB in achieving high throughput at lower clock speeds, there by simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies the host’s clocking-in of data there by making it ideal for applications involving FPGAs, DSPs. ADS89xxB is compatible with standard SPI Interface.

The ADS89xxB has an internal data parity feature which can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

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Technical documentation

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	Type	Title	Date
*	Data sheet	ADS890xB 20-Bit, High-Speed SAR ADCs With Integrated Reference Buffer, and Enhanced Performance Features datasheet (Rev. A)	29 Jun 2017
	User guide	ADS8900EVM-PDK Evaluation Module (Rev. C)	19 Aug 2021
	Application note	Powering a dual-supply op amp circuit with one LDO (Rev. A)	07 Mar 2019
	Application note	High-voltage battery monitor circuit: ±20V, 0–10kHz, 18-bit fully differential (Rev. A)	23 Jan 2019
	Application note	Attenuator Amplifier Design to Maximize the Input Voltage of Differential ADCs	14 Jun 2018
	Technical article	Take your ultrasound design to the next level	08 Feb 2018
	Application note	High-current battery monitor circuit: 0–10A, 0-10kHz, 18 bit	22 Dec 2017
	Application note	Improving Input Settling for Precision Data Converters	12 Dec 2017
	Application note	Optimizing Data Transfer on High-Resolution, High-Throughput Data Converters	12 Dec 2017
	Application note	Simplify Isolation Designs Using an Enhanced-SPI ADC Interface	11 Dec 2017
	Technical article	Powering up the performance of sensitive test and measurement systems	17 Oct 2017
	Application note	Dual Bipolar Power-Supply Considerations for Amplifiers	01 Aug 2017
	Application note	Improving Resolution of SAR ADC	14 Jun 2017
	Technical article	How to enable high-accuracy CW Doppler through discrete, precision data converters	24 Mar 2017
	Technical article	Detecting pesky failing batteries before they cause a problem	17 Feb 2017
	White paper	Enabling Faster, Smarter, and More Robust Solutions for SAR ADSx With multiSPI	08 Nov 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADS8900BEVM-PDK — ADS8900B Fully-Differential Input, 20-Bit SAR ADC EVM Performance Demonstration Kit (PDK)

The ADS8900B evaluation module (EVM) performance demonstration kit (PDK) is a platform for evaluating the performance of the ADS8900B successive-approximation register (SAR) analog-to-digital converter (ADC), which is a fully-differential input, 20-bit, 1-MSPS device (...)

User guide

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Evaluation board

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User guide

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Support software

Precision Signal Injector (PSI) GUI Installer

SBAC170.ZIP (245377 KB)

Simulation model

ADS8900B TINA-TI Transient Spice Model

SBAM302.ZIP (13 KB) - TINA-TI Spice Model

Simulation model

ADS8900B TINA-TI Reference Design

SBAM303.ZIP (91 KB) - TINA-TI Reference Design

Simulation model

ADS890XB IBIS Model (Rev. A)

SBAM305A.ZIP (16 KB) - IBIS Model

Simulation tool

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Simulation tool

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Calculation tool

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Calculation tool

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The TIDA-01035 is a 20-bit, 1 MSPS isolated analog input data acquisition reference design demonstrating how to resolve and optimize performance challenges typical of digitally isolated data acquisition systems.

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