Simple Open Real-Time Ethernet (SORTE) Master With PRU-ICSS Reference Design


Design files


The TIDEP-0085 reference design implements a Simple Open Real-Time Ethernet (SORTE) master with the Programmable Real-time Unit and Industrial Communication Subsystem (PRU-ICSS). SORTE enables customer applications to exchange process data between the master and devices in a 4-µs cycle time. The design contains open source PRU firmware to enable customer to differentiate their products.

The SORTE protocol includes device discovery, parametrization, PHY and cable delay measurement, synchronization and process data exchange.

  • SORTE master reference implementation
  • Enables 4-µs cycle time to exchange process data
  • PRU firmware provided in source code
  • Fully customizable PRU firmware
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Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDUCK4.PDF (2694 K)

Reference design overview and verified performance test data


Detailed schematic diagram for design layout and components


Complete listing of design components, reference designators, and manufacturers/part numbers


Detailed overview of design layout for component placement

TIDCDD3.ZIP (3012 K)

Design file that contains information on physical board layer of design PCB


PCB layer plot file used for generating PCB design layout


Includes TI products in the design and potential alternatives.

Arm-based processors

AM3357Sitara processor: Arm Cortex-A8, EtherCAT, PRU-ICSS, CAN

Data sheet: PDF | HTML
Ethernet PHYs

DP83822ILow-power, robust 10/100-Mbps Ethernet PHY transceiver with 16-kV ESD

Data sheet: PDF | HTML
Ethernet PHYs

TLK110Industrial 10/100 Ethernet PHY

Data sheet: PDF

Start development


Evaluation board

TMDSICE3359 — AM3359 Industrial Communications Engine

The AM3359 Industrial Communications Engine (ICE) is a development platform targeted for systems that specifically focus on the industrial communications capabilities of the Sitara AM335x Arm® Cortex™-A8 processors.

The AM335x Arm Cortex-A8 processors integrate the Programmable Real-time Unit (PRU) (...)

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Technical documentation

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* Design guide Simple Open Real-Time Ethernet (SORTE) Master With PRU-ICSS Reference Design May 01, 2017
More literature Emulation Wiki -- In-depth technical and "how-to" articles, FAQs, etc. Mar. 24, 2011

Related design resources

Reference designs

TIDEP-0086 Simple Open Real-Time Ethernet (SORTE) Device With PRU-ICSS Reference Design TIDEP0032 Multi-Protocol Industrial Communications TIDEP0061 4-Axis CNC Router with 250-kHz Control Loop with PRU-ICSS based on SORTE Reference Design

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