Product details


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  • Low Power Consumption:
    • Single Supply: <205mW PHY, 275mW with
      Center Tap (Typical)
    • Dual Supplies: <126mW PHY, 200mW with
      Center Tap (Typical)
  • Programmable Power Back Off to reduce PHY power up
    to 20% in systems with shorter cables
  • Low deterministic latency supports IEEE1588
  • Cable Diagnostics
  • Programmable Fast Link Down Modes,
    <10µs reaction time
  • Variable I/O voltage range: 1.8V to 3.3V
  • 3.3V MAC Interface
  • Fixed TX Clock to XI, with programmable
    phase shift
  • Auto-MDIX for 10/100Mbs
  • Energy Detection Mode
  • 25 MHz Clock Out
  • MII and RMII Capabilities
  • Serial Management Interface
  • IEEE 802.3u MII
  • IEEE 802.3u Auto-Negotiation and Parallel
  • Error-Free 100Base-T Operation up to
    150 Meters Under Typical Conditions
  • Error-Free 10Base-T Operation up to
    300 Meters Under Typical Conditions
  • IEEE 802.3u ENDEC, 10Base-T Transceivers and Filters
  • IEEE 802.3u PCS, 100Base-TX Transceivers
  • IEEE 1149.1 JTAG
  • Integrated ANSI X3.263 Compliant TP-PMD Physical
    Sublayer with Adaptive Equalization and Baseline
    Wander Compensation
  • Programmable LED Support Link, 10/100Mbs Mode,
    Activity, and Collision Detect
  • 10/100Mbs Packet BIST (Built in Self Test)
  • HBM ESD protection on RD± and TD± of 16kV
  • 48-pin LQFP Package (7mm) × (7mm)
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The TLK110 is a single-port Ethernet PHY for 10Base-T and 100Base TX signaling. This device integrates all the physical-layer functions needed to transmit and receive data on standard twisted-pair cables. The TLK110 supports the standard Media Independent Interface (MII) and Reduced Media Independent Interface (RMII) for direct connection to a Media Access Controller (MAC).

The TLK110 is designed for power-supply flexibility, and can operate with a single 3.3V power supply or with combinations of 3.3V and 1.55V power supplies for reduced power operation.

The TLK110 uses mixed-signal processing to perform equalization, data recovery, and error correction to achieve robust operation over CAT 5 twisted-pair wiring. This device not only meets the requirements of IEEE 802.3, but maintains high margins in terms of cross-talk and alien noise.

The TLK110 Ethernet PHY has a special Power Back Off mode to conserve power in systems with relatively short cables. This mode provides the flexibility to reduce system power when the system is not required to drive the standard IEEE 802.3 100m cable length, or the extended 150m, error-free cable reach of the TLK110. For more detail, see application note SLLA328.

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Technical documentation

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View all 11
Type Title Date
* Data sheet Industrial Temp, Single Port 10/100Mbs Ethernet PHY Transceiver, TLK110 datasheet (Rev. D) Dec. 22, 2013
Application note Selection and specification of crystals for Texas Instruments ethernet physical Feb. 06, 2019
Technical article New simple open real-time Ethernet (SORTE) protocol supports 4µs cycle time Nov. 21, 2016
User guide Parallel Redundancy Protocol Ethernet for Substation Automation Design Guide Mar. 29, 2016
Technical article Designing for industrial environments Jan. 15, 2014
User guide TLK1xx Software GUI Aug. 15, 2013
Application note TLK110 Partial Radiated Emissions and Radiated Immunity Test Report Jan. 10, 2013
Application note TLK110 Ethernet PHY Transformerless Operation Sep. 17, 2012
Application note TLK1XX Design & Layout Guide (Rev. A) Aug. 15, 2012
Application note TLK110 Power Back Off for Short Cables Jul. 17, 2012
User guide TLK110CUSEVM User Guide Dec. 07, 2011

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide

The TLK110CUSEVM provides a platform that allows the users to easily evaluate, design and market systems containing the TLK110 device.

  • Industrial temperatures (-40°C to 85°C)
  • Industrial temperature external magnetics
  • Control and status:
    • Configurable 8 PHY Addresses – 01h (default) or any other address between 00h - 07h using jumpers
    • 8 LEDs – 2 power, 6 status LEDs (speed, link, and active data)
  • Strap options:
    • MII/RMII jumper (MII disable)
    • (...)

Software development

SLLC430.ZIP (7276 KB)
Ethernet PHY Linux drivers & tools
ETHERNET-SW The Linux drivers for Texas Instruments' Ethernet physical layer (PHY) transceivers support communication through the serial management interface (MDC/MDIO) to configure and read PHY registers.

The USB-2-MDIO software lets you directly access the registers during debug and prototyping.  (...)

Design tools & simulation

SLLM167A.ZIP (107 KB) - IBIS Model
SLLM196.ZIP (1 KB) - BSDL Model
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

Reference designs

Many TI reference designs include the TLK110 Use our reference design selection tool to review and identify designs that best match your application and parameters.

CAD/CAE symbols

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LQFP (PT) 48 View options

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