SLVSF11 June 2019 TPS652170
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
DEFLS1 is shown in Figure 50 and described in Table 22.
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This register is password protected.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved | LS1LDO3 | LDO3[4:0] | |||||
R-00b | R/W-0b | R/W-00110b |
Bit | Field | Type | Reset | Description | |
---|---|---|---|---|---|
7–6 | Reserved | R | 00b | This bit is reserved | |
5 | LS1LDO3 | R/W, E2 |
LS or LDO tracking bit 0b = FET functions as load switch (LS1). 1b = FET is configured as LDO3. |
||
4–0 | LDO3[4:0] | R/W, E2 | 0 0110b |
LDO3 output voltage setting (LS1LDO3 = 1b) |
|
0 0000b = 1.5 V 0 0001b = 1.55 V 0 0010b = 1.6 V 0 0011b = 1.65 V 0 0100b = 1.7 V 0 0101b = 1.75 V 0 0110b = 1.8 V 0 0111b = 1.85 V 0 1000b = 1.90V 0 1001b = 2 V 0 1010b = 2.1 V 0 1011b = 2.2 V 0 1100b = 2.3 V 0 1101b = 2.4 V 0 1110b = 2.45 V 0 1111b = 2.5 V |
1 0000b = 2.55 V 1 0001b = 2.6 V 1 0010b = 2.65 V 1 0011b = 2.7 V 1 0100b = 2.75 V 1 0101b = 2.8 V 1 0110b = 2.85 V 1 0111b = 2.9 V 1 1000b = 2.95 V 1 1001b = 3 V 1 1010b = 3.05 V 1 1011b = 3.1 V 1 1100b = 3.15 V 1 1101b = 3.2 V 1 1110b = 3.25 V 1 1111b = 3.3 V |