JAJSM24A December   2023  – May 2024 ADC3910D025 , ADC3910D065 , ADC3910D125 , ADC3910S025 , ADC3910S065 , ADC3910S125

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics - Power Consumption
    6. 5.6  Electrical Characteristics - DC Specifications
    7. 5.7  Electrical Characteristics - AC Specifications (25 MSPS)
    8. 5.8  Electrical Characteristics - AC Specifications (65 MSPS)
    9. 5.9  Electrical Characteristics - AC Specifications (125 MSPS)
    10. 5.10 Timing Requirements
    11. 5.11 Output Interface Timing Diagram
    12. 5.12 Typical Characteristics - 25MSPS
    13. 5.13 Typical Characteristics - 65MSPS
    14. 5.14 Typical Characteristics - 125MSPS
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 ADC Features
        1. 6.3.1.1 Low Latency Mode
        2. 6.3.1.2 Full Digital Feature Mode
        3. 6.3.1.3 Interleaving Mode
      2. 6.3.2 Analog Input
        1. 6.3.2.1 Single Ended Input
        2. 6.3.2.2 Differential Input
        3. 6.3.2.3 Analog Input Bandwidth
      3. 6.3.3 Sampling Clock Input
      4. 6.3.4 Voltage Reference
      5. 6.3.5 Over-range (OVR)
      6. 6.3.6 Digital Features
        1. 6.3.6.1 Digital Down Converter
          1. 6.3.6.1.1 Digital Down Converter Data Select
          2. 6.3.6.1.2 Decimation Filter
          3. 6.3.6.1.3 DDC Over-range
          4. 6.3.6.1.4 Output Formatting with Decimation
        2. 6.3.6.2 Digital Comparator
          1. 6.3.6.2.1 Comparator Data Select
          2. 6.3.6.2.2 Comparator High and Low Threshold
          3. 6.3.6.2.3 Comparator Configuration Compare Mode
          4. 6.3.6.2.4 Comparator Event Configuration
        3. 6.3.6.3 Statistics Engine
          1. 6.3.6.3.1 Statistics Engine Data Select
          2. 6.3.6.3.2 Window Configuration
        4. 6.3.6.4 Digital Alerts
      7. 6.3.7 Digital Interface
        1. 6.3.7.1 Parallel CMOS Output
        2. 6.3.7.2 Serialized CMOS Output
      8. 6.3.8 Test Patterns
        1. 6.3.8.1 Bypass Test Pattern
        2. 6.3.8.2 Digital Test Pattern
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Power Down Options
    5. 6.5 Programming
      1. 6.5.1 Configuration using the SPI interface
        1. 6.5.1.1 Register Write
        2. 6.5.1.2 Register Read
    6. 6.6 Register Maps
      1. 6.6.1 Register Descriptions
      2. 6.6.2 Statistics Engine Register Map
      3. 6.6.3 Alerts Register Map
  8. Application Information Disclaimer
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input Signal Path
        2. 7.2.2.2 Sampling Clock
        3. 7.2.2.3 Voltage Reference
      3. 7.2.3 Application Curves
    3. 7.3 Initialization Set Up
      1. 7.3.1 Register Initialization During Operation
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 ドキュメントの更新通知を受け取る方法
    2. 8.2 サポート・リソース
    3. 8.3 Trademarks
    4. 8.4 静電気放電に関する注意事項
    5. 8.5 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Typical Characteristics - 25MSPS

Typical values at TA = 25°C, ADC sampling rate = 25MSPS, AIN = –1dBFS, differential input, AVDD = IOVDD = 1.8V, internal 1.2V voltage reference, unless otherwise noted.

ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  Single Tone FFT at FIN = 1MHz
SNR = 61.2dBFS, SFDR = 64dBc, Non HD23 = 84dBFS
Figure 5-5 Single Tone FFT at FIN = 1MHz
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  Single Tone FFT at FIN = 10MHz
SNR = 61dBFS, SFDR = 65dBc, Non HD23 = 87dBFS
Figure 5-7 Single Tone FFT at FIN = 10MHz
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  Two
                        Tone FFT at FIN = 10/12MHz
AIN = -7dBFS/tone, IMD3 = -98dBc
Figure 5-9 Two Tone FFT at FIN = 10/12MHz
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  AC
                        Performance vs Input Amplitude
FIN = 1MHz
Figure 5-11 AC Performance vs Input Amplitude
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  Crosstalk vs Input Frequency
Figure 5-13 Crosstalk vs Input Frequency
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  AC
                        Performance vs VCM vs Temperature
FIN = 1MHz
Figure 5-15 AC Performance vs VCM vs Temperature
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  DNL
                        vs ADC Code
FIN = 5MHz
Figure 5-17 DNL vs ADC Code
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  Pulse
                        Response
Pulse Input = 1MHz
Figure 5-19 Pulse Response
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  Current vs Decimation
FIN = 1MHz, 16 bit resolution, DDR, 8 Output Lanes
Figure 5-21 Current vs Decimation
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  IIOVDD Current vs Load Capacitance
FIN = 5MHz
Figure 5-23 IIOVDD Current vs Load Capacitance
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  Single Tone FFT at FIN = 1MHz, Single-ended Input
SNR = 59dBFS, SFDR = 63dBc, Non HD23 = 85dBFS
Figure 5-6 Single Tone FFT at FIN = 1MHz, Single-ended Input
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  Single Tone FFT at FIN = 10MHz, AIN = -20dBFS
SNR = 61.2dBFS, SFDR = 63dBc, Non HD23 = 83dBFS
Figure 5-8 Single Tone FFT at FIN = 10MHz, AIN = -20dBFS
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  AC
                        Performance vs Input Frequency
Figure 5-10 AC Performance vs Input Frequency
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  AC
                        Performance vs Sampling Rate
FIN = 1MHz
Figure 5-12 AC Performance vs Sampling Rate
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  AC
                        Performance vs AVDD
FIN = 1MHz
Figure 5-14 AC Performance vs AVDD
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  INL
                        vs ADC Code
FIN = 5MHz
Figure 5-16 INL vs ADC Code
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  DC
                        Offset Histogram
Figure 5-18 DC Offset Histogram
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  Current vs Sampling Rate
FIN = 5MHz, DDC Bypass
Figure 5-20 Current vs Sampling Rate
ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125  Current vs Temperature
FIN = 5MHz, DDR Interface Mode
Figure 5-22 Current vs Temperature