JAJSM24 December 2023 ADC3910D125
PRODMIX
A global or fast power down mode can be enabled via SPI as well as using the power down pin (OENZ/PDN). There is an internal pull-down resistor on the OENZ/PDN input pin, and the pin is active HIGH. The pin needs to be pulled high externally to enter power down mode. The SPI register map provides the capability to enable or disable individual blocks directly or via PDN pin mask to trade off power consumption vs wake up time as shown in the Timing Requirements table.