SWCU193 April 2023 CC2340R2 , CC2340R5 , CC2340R5-Q1
Device boot is the process that happens after a device reset and before the first instruction of a user application is executed. This process runs out of code in ROM memory and performs the following tasks:
The serial ROM bootloader can be used for updating on-chip flash via the SPI or UART interface after production. However, the ROM serial bootloader doesn't support security functions and a separate secure boot or secure FW update software should be used for validating the new FW images updated by the ROM serial bootloader.
There are multiple ways to reset the device and the PMCTL.RSTSTA register reports which type of reset has occurred to boot code (and later to bootloader and application) see Table 8-1.
RSTSTA[7:4]SYSSRC | RSTSTA[3]TSDEV | RSTSTA[2:0]RESETSRC | Reset Type | Description | Memory/state retention |
---|---|---|---|---|---|
x | 0 | 0 | Power-on reset | Power on reset circuit has released due to supply voltage VDDS above threshold. Seen when power first applied | None |
x | 0 | 1 | Pin reset | External reset pin (active low) has been released |
Retained SRAM unreliable REG3V3 registers retained |
x | 1 | 1 | Thermal shutdown | Thermal shutdown reset has released due to temperature being below threshold | None |
x | 0 | 2 | VDDS brownout | VDDS brownout detector has reset device | None |
x | 0 | 4 | VDDR brownout | VDDR brownout detector has reset device |
Retained SRAM unreliable REG3V3 register retained |
0 | 0 | 6 | LF clock loss | LF clock stopped running while in standby power state. |
SRAM retained(1) REG3V3 register retained |
1 | 0 | 6 | CPU-requested reset | System reset requested through ARM core's AIRCR.SYSRESETREQ flag | SRAM retained(1)REG3V3 register retained |
2 | 0 | 6 | CPU Lockup | ARM core went into lockup state which triggered system reset | SRAM retained(1)REG3V3 register retained |
3 | 0 | 6 | Watchdog timeout | Watchdog timer timeout occurred and triggered system reset | SRAM retained(1)REG3V3 register retained |
4 | 0 | 6 | System reset request | System reset requested through PMCTL.RSTCTL.SYSRST flag | SRAM retained(1)REG3V3 register retained |
5 | 0 | 6 | Serial Wire Debug reset request | System reset requested by external debug probe by writing value 0x5C to SWD:SECAP.RSTCTL.RST | SRAM retained(1)REG3V3 register retained |
14 | 0 | 6 | Analog error | TI internal use: should not occur on production devices | None |
15 | 0 | 6 | Digital error | TI internal use: should not occur on production devices | None |