TPS7A33

ACTIVE

1-A, high-PSRR, negative, adjustable low-dropout voltage regulator with enable

Product details

Output options Adjustable Output, Negative Output Iout (max) (A) 1 Vin (max) (V) -3 Vin (min) (V) -36 Vout (max) (V) -1.2 Vout (min) (V) -33 Fixed output options (V) -1.2 Noise (µVrms) 16 Iq (typ) (mA) 0.21 Thermal resistance θJA (°C/W) 31 Rating Catalog Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Features Enable, Soft start Accuracy (%) 2.5 PSRR at 100 KHz (dB) 64 Dropout voltage (Vdo) (typ) (mV) 290 Operating temperature range (°C) -40 to 125
Output options Adjustable Output, Negative Output Iout (max) (A) 1 Vin (max) (V) -3 Vin (min) (V) -36 Vout (max) (V) -1.2 Vout (min) (V) -33 Fixed output options (V) -1.2 Noise (µVrms) 16 Iq (typ) (mA) 0.21 Thermal resistance θJA (°C/W) 31 Rating Catalog Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Features Enable, Soft start Accuracy (%) 2.5 PSRR at 100 KHz (dB) 64 Dropout voltage (Vdo) (typ) (mV) 290 Operating temperature range (°C) -40 to 125
VQFN (RGW) 20 25 mm² 5 x 5
  • Input Voltage Range: –3 V to –36 V
  • Noise:
    • 16 µVRMS (10 Hz to 100 kHz)
  • Power-Supply Ripple Rejection:
    • 72 dB (10 kHz)
  • Adjustable Output: –1.18 V to –33 V
  • Maximum Output Current: 1 A
  • Stable With Ceramic Capacitors ≥ 10 µF
  • Built-In Current-Limit and Thermal Shutdown
    Protection
  • Available in an External Heatsink-Capable, High
    Thermal Performance TO-220 Package
  • Operating Temperature Range:
    –40°C to 125°C
  • Input Voltage Range: –3 V to –36 V
  • Noise:
    • 16 µVRMS (10 Hz to 100 kHz)
  • Power-Supply Ripple Rejection:
    • 72 dB (10 kHz)
  • Adjustable Output: –1.18 V to –33 V
  • Maximum Output Current: 1 A
  • Stable With Ceramic Capacitors ≥ 10 µF
  • Built-In Current-Limit and Thermal Shutdown
    Protection
  • Available in an External Heatsink-Capable, High
    Thermal Performance TO-220 Package
  • Operating Temperature Range:
    –40°C to 125°C

The TPS7A33 series of linear regulators are negative voltage (–36 V), ultralow-noise (16-µVRMS, 72-dB PSRR) linear regulators capable of sourcing a maximum load of 1 A.

The TPS7A33 series include a complementary metal oxide semiconductor (CMOS) logic-level-compatible enable pin (EN) to allow for user-customizable power management schemes. Other features available include built-in current limit and thermal shutdown features to protect the device and system during fault conditions.

The TPS7A33 family is designed using bipolar technology primarily for high-accuracy, high-precision instrumentation applications, where clean voltage rails are critical to maximize system performance. This feature makes it ideal to power operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.

In addition, the TPS7A33 family of linear regulators is suitable for post DC-DC converter regulation. By filtering out the output voltage ripple inherent to DC-DC switching conversion, maximum system performance is ensured in sensitive instrumentation, medical, test and measurement, audio, and RF applications.

For applications where positive and negative high-performance rails are required, consider the TPS7A4700 positive high-voltage, ultralow-noise, low-dropout linear regulator as well.

The TPS7A33 series of linear regulators are negative voltage (–36 V), ultralow-noise (16-µVRMS, 72-dB PSRR) linear regulators capable of sourcing a maximum load of 1 A.

The TPS7A33 series include a complementary metal oxide semiconductor (CMOS) logic-level-compatible enable pin (EN) to allow for user-customizable power management schemes. Other features available include built-in current limit and thermal shutdown features to protect the device and system during fault conditions.

The TPS7A33 family is designed using bipolar technology primarily for high-accuracy, high-precision instrumentation applications, where clean voltage rails are critical to maximize system performance. This feature makes it ideal to power operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.

In addition, the TPS7A33 family of linear regulators is suitable for post DC-DC converter regulation. By filtering out the output voltage ripple inherent to DC-DC switching conversion, maximum system performance is ensured in sensitive instrumentation, medical, test and measurement, audio, and RF applications.

For applications where positive and negative high-performance rails are required, consider the TPS7A4700 positive high-voltage, ultralow-noise, low-dropout linear regulator as well.

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Technical documentation

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Type Title Date
* Data sheet TPS7A33 –36-V, 1-A, Ultralow-Noise Negative Voltage Regulator datasheet (Rev. D) PDF | HTML 18 Oct 2013
White paper Parallel LDO Architecture Design Using Ballast Resistors PDF | HTML 14 Dec 2022
White paper Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast PDF | HTML 13 Dec 2022
Application note A Topical Index of TI LDO Application Notes (Rev. F) 27 Jun 2019
Technical article Design a pre-tracking regulator, part 2: for a negative LDO PDF | HTML 26 Apr 2019
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 21 Mar 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DDC2256AEVM — DDC2256A 256-Channel Current-Input Analog-to-Digital Converter Evaluation Module

The DDC2256AEVM evaluation module  (EVM)  is  an  evaluation  kit  for the DDC2256A,  a  256-channel,  current  input,  24-bit analog-to-digital (A/D) converter. The EVM kit, comprised of a DUT board and a capture board, contains two DDC2256A (...)

User guide: PDF
Simulation model

TPS7A3301 PSpice Transient Model

SBVM105.ZIP (32 KB) - PSpice Model
Simulation model

TPS7A3301 TINA-TI Transient Reference Design

SBVM399.ZIP (12 KB) - TINA-TI Reference Design
Simulation model

TPS7A3301 TINA-TI Transient Spice Model

SBVM400.ZIP (5 KB) - TINA-TI Spice Model
Simulation model

TPS7A3301 Unencrypted PSpice Transient Model

SBVM665.ZIP (0 KB) - PSpice Model
Calculation tool

PARALLEL-LDO-CALC Parallel low-dropout (LDO) calculator

The parallel low-dropout (LDO) calculator is a Microsoft® Excel®-based tool that provides worst-case analysis for parallel LDO regulators using ballast resistors. The tool helps the user identify the minimum number of parallel LDO regulators required and optimum ballast resistance for a (...)

Supported products & hardware

Supported products & hardware

Products
Linear & low-dropout (LDO) regulators
TPS7A33 1-A, high-PSRR, negative, adjustable low-dropout voltage regulator with enable TPS7A47 1-A, 36-V, low-noise, high-PSRR, low-dropout voltage regulator with enable TPS7A47-Q1 Automotive 1-A, 36-V, low-noise, high-PSRR, low-dropout voltage regulator with enable TPS7A4701-EP Enhanced product, 36-V, 1-A, 4-μVRMS, RF LDO voltage regular TPS7A52 2-A, low-VIN (1.1-V), low-noise, high-accuracy, ultra-low-dropout (LDO) voltage regulator TPS7A52-Q1 Automotive 2-A, low-VIN (1.1-V), low-noise, high-accuracy, ultra-low-dropout (LDO) voltage regulator TPS7A53 3-A, low-VIN (1.1 V) low-noise high-accuracy ultra-low-dropout (LDO) voltage regulator TPS7A53-Q1 Automotive, 3-A, low-VIN (1.1 V) low-noise high-accuracy ultra-low-dropout (LDO) voltage regulator TPS7A53A-Q1 Automotive, 3-A, low-VIN 5.6-µVRMS low-noise high-accuracy ultra-low dropout voltage regulator TPS7A53B 3-A, 1.1-V, low-VIN, low-noise high-accuracy ultra-low-dropout voltage regulator with 0.5-V low VREF TPS7A54 4-A, low-VIN (1.1-V), low-noise, high-accuracy, ultra-low-dropout (LDO) voltage regulator TPS7A54-Q1 Automotive 4-A, low-VIN (1.1-V), low-noise, high-accuracy, ultra-low-dropout (LDO) voltage regulator TPS7A57 5-A, low-input-voltage, low-noise, high-accuracy low-dropout (LDO) voltage regulator TPS7A83A 2-A, low-VIN (1.1-V), low-noise, high-accuracy, ultra-low-dropout voltage regulator with power good TPS7A84A 3-A, low-VIN (1.1-V), low-noise, high-accuracy, ultra-low-dropout voltage regulator with power good TPS7A85A 4-A, low-VIN (1.1-V), low-noise, high-accuracy, ultra-low-dropout voltage regulator with power good TPS7A94 1-A, ultra-low noise, ultra-high PSRR, RF voltage regulator TPS7B7702-Q1 Automotive 300-mA, off-battery (40-V), dual-channel adjustable antenna low-dropout voltage regulator TPS7A8300 2-A, low-VIN, low-2-A, low-VIN, low-noise, ultra-low-dropout voltage regulator with power good wi TPS7A84 3-A, low-VIN, low-noise, ultra-low-dropout voltage regulator with power good with high-accuracy TPS7A85 4-A, low-VIN, low-noise, ultra-low-dropout voltage regulator with power good with high-accuracy TPS7A96 2-A, ultra-low noise ultra-high PSRR RF voltage regulator TPS7A4501-SP Radiation-hardened, QMLV, 1.5-V to 20-V input 1.5-A low-dropout (LDO) regulator TPS7H1111-SP Radiation-hardened, QMLV and QMLP, 1.5A ultra-low-noise high-PSRR low-dropout (LDO) regulator TPS7H1111-SEP Radiation-tolerant, 1.5A, ultra-low-noise ultra-high-PSRR RF LDO regulator
Hardware development
Evaluation board
TPS7A57EVM-081 TPS7A57 evaluation module for 5-A low-noise high-accuracy low-dropout (LDO) voltage regulator
Reference designs

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Design guide: PDF
Schematic: PDF
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Schematic: PDF
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Design guide: PDF
Schematic: PDF
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This reference design provides a practical example of interleaved RF-sampling analog-to-digital converters (ADCs) to achieve a 12.8-GSPS sampling rate. This is done by time interleaving two RF-sampling ADCs. Interleaving requires a phase shift between the ADCs, which this reference design achieves (...)
Design guide: PDF
Schematic: PDF
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TIDA-010128 — Scalable 20.8 GSPS reference design for 12 bit digitizers

This reference design describes a 20.8 GSPS sampling system using RF sampling analog-to-digital converters (ADCs) in time interleaved configuration. Time interleaving method is a proven and traditional way of increasing sample rate, however, matching individual ADCs offset, gain and sampling time (...)
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Schematic: PDF
Reference designs

TIDA-010122 — Reference design synchronizing data converter DDC and NCO features for multi-channel RF systems

This reference design addresses synchronization design challenges associated with emerging 5G adapted applications like massive multiple input multiple output (mMIMO), phase array radar and communication payload. The typical RF front end contains antenna, low-noise amplifier (LNA), mixer, local (...)
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Reference designs

TIDA-00684 — High-Bandwidth Arbitrary Waveform Generator Reference Design: DC or AC coupled, High-Voltage output

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Reference designs

PMP10651 — 2.2MHz Switching, Synchronous Split Supply Reference Design for 12V Battery with all Protections

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Reference designs

PMP8372 — 40V Dual 1A Power Module w/Low Noise LDOs Split-Rail (±5V) Output Voltages Reference Design

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Test report: PDF
Schematic: PDF
Package Pins Download
VQFN (RGW) 20 View options

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