SPRSP07F June 2017 – December 2019 66AK2G12
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
The DVDD_DDRDLL pins provide power to DDR EMIF PHY DLLs. These supply pins must be filtered such that they have less than 36-mV peak-to-peak noise while remaining within the voltage ranged defined in Section 5.4, Recommended Operating Conditions.
The recommended circuit topology for this filter is shown in Figure 7-23.