SPRSP07F June 2017 – December 2019 66AK2G12
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
The general-purpose input/output (GPIO) peripheral provides dedicated general-purpose pins that can be configured as either inputs or outputs. When configured as an output, user can write to an internal register to control the state driven on the output pin. When configured as an input, user can obtain the state of the input by reading the state of an internal register.
In addition, the GPIO peripheral can produce CPU interrupts and EDMA synchronization events in different interrupt/event generation modes.
The device has two instances of GPIO144 modules (GPIO_0 and GPIO_1). The GPIO pins are grouped into banks (16 pins per bank), which means that each GPIO module provides up to 144 dedicated general-purpose pins with input and output capabilities; thus, the general-purpose interface supports up to 288 (2 instances × (9 banks × 16 pins)) pins. Since GPIO1_[143:68] are reserved in this Device, general-purpose interface supports up to 212 pins.
Each channel in the GPIO modules has the following features:
For more information, see section General-Purpose Interface (GPIO) in chapter Peripherals of the Device TRM.