SBAS949A February 2020 – February 2021 ADS131M06
The SYNC/RESET pin is an active low, dual-function pin that generates a reset if the pin is held low longer than tw(RSL). The device maintains a reset state until SYNC/RESET is returned high. The host must wait for at least tREGACQ after SYNC/RESET is brought high or for the DRDY rising edge before communicating with the device. Conversion data are generated immediately after the registers are reset to their default values, as described in the Section 8.4.2 section.