SBAS949A February 2020 – February 2021 ADS131M06
The ADS131M06 can be reset via the SPI RESET command (0011h). The device communicates in frames of a fixed length. See the Section 220.127.116.11 section for details regarding SPI data framing on the ADS131M06. The RESET command occurs in the first word of the data frame, but the command is not latched by the device until the entire frame is complete. After the response completes channel data and CRC words are clocked out. Terminating the frame early causes the RESET command to be ignored. Eight words are required to complete a frame on the ADS131M06.
A reset occurs immediately after the command is latched. The host must wait for tREGACQ before communicating with the device to ensure the registers have assumed their default settings. Conversion data are generated immediately after the registers are reset to their default values, as described in the Section 8.4.2 section.