SLASE67A January 2015 – August 2019 ADS54J54
PRODUCTION DATA.
D15 | D14 | D13 | D12 | D11 | D10 | D9 | D8 | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ANALOG SLEEP MODES – ENABLE pin |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
D15:D0 | ANALOG SLEEP MODES – ENABLE pin | R/W | Power-down function assigned to ENABLE pin. When any bit is set, the corresponding function is always enabled regardless of status of the ENABLE pin. This assumes address 0x06 is in default configuration. | |
D13 | R/W | 0 | Light sleep channel A | |
D11 | R/W | 0 | Light sleep channel B | |
D9 | R/W | 0 | Light sleep channel C | |
D7 | R/W | 0 | Light sleep channel D | |
D6 | R/W | 0 | Temperature sensor | |
D4 | R/W | 0 | Clock buffer | |
D3 | R/W | 0 | Clock divider channel AB | |
D2 | R/W | 0 | Clock divider channel CD | |
D1 | R/W | 0 | Buffer SYSREFAB | |
D0 | R/W | 0 | Buffer SYSREFCD |
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Description | |
---|---|
0000 0000 0000 0000 | Global power down |
1000 0000 0000 0000 | Standby |
1000 0000 0001 1111 | Deep sleep |
1010 1010 1001 1111 | Light sleep (if unused, clock divider CD and SYSREFCD can be set to 0 also) |