RIN filters, VDD, AVDD filters, and the CVDD capacitor should be placed close to the device pins.
Separate the device ground plane (low current ground) from the high current path. Filter capacitors should reference to the low current ground path or device Vss.
In a stack configuration, the RCTRD and RCTRC should be placed closer to the lower device CTRD and CTRC pins.
RGS should be placed near the FETs.
In a stacked configuration, it must be ensured in the PCB layout that the trace from the VC5 pin to a cell and the trace from the VC0 pin of the next upper device to the immediately higher cell are kept separate.