SLVSGI9A october   2022  – july 2023 DRV8411A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
    1.     Pin Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Diagrams
  9. 8 Typical Characteristics
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 External Components
    4. 9.4 Feature Description
      1. 9.4.1 Bridge Control
      2. 9.4.2 Current Sense and Regulation
        1. 9.4.2.1 Current Sensing
        2. 9.4.2.2 Current Regulation
      3. 9.4.3 Protection Circuits
        1. 9.4.3.1 Overcurrent Protection (OCP)
        2. 9.4.3.2 Thermal Shutdown (TSD)
        3. 9.4.3.3 Undervoltage Lockout (UVLO)
    5. 9.5 Device Functional Modes
      1. 9.5.1 Active Mode
      2. 9.5.2 Low-Power Sleep Mode
      3. 9.5.3 Fault Mode
    6. 9.6 Pin Diagrams
      1. 9.6.1 Logic-Level Inputs
  11. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Typical Application
        1. 10.1.1.1 Stepper Motor Application
          1. 10.1.1.1.1 Design Requirements
          2. 10.1.1.1.2 Detailed Design Procedure
            1. 10.1.1.1.2.1 Stepper Motor Speed
            2. 10.1.1.1.2.2 Current Regulation
            3. 10.1.1.1.2.3 Stepping Modes
              1. 10.1.1.1.2.3.1 Full-Stepping Operation
              2. 10.1.1.1.2.3.2 Half-Stepping Operation with Fast Decay
              3. 10.1.1.1.2.3.3 Half-Stepping Operation with Slow Decay
          3. 10.1.1.1.3 Application Curves
        2. 10.1.1.2 Dual BDC Motor Application
          1. 10.1.1.2.1 Design Requirements
          2. 10.1.1.2.2 Detailed Design Procedure
            1. 10.1.1.2.2.1 Motor Voltage
            2. 10.1.1.2.2.2 Current Regulation
          3. 10.1.1.2.3 Application Curves
        3. 10.1.1.3 Thermal Considerations
          1. 10.1.1.3.1 Maximum Output Current
          2. 10.1.1.3.2 Power Dissipation
          3. 10.1.1.3.3 Thermal Performance
            1. 10.1.1.3.3.1 Steady-State Thermal Performance
            2. 10.1.1.3.3.2 Transient Thermal Performance
  12. 11Power Supply Recommendations
    1. 11.1 Bulk Capacitance
    2. 11.2 Power Supply and Logic Sequencing
  13. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  14. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resources
    4. 13.4 Trademarks
  15. 14Mechanical, Packaging, and Orderable Information
    1. 14.1 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PWP|16
  • RTE|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.5.2 Low-Power Sleep Mode

The DRV8411A device supports a low power mode to reduce current consumption from the VM pin when the driver is not active. When the AIN1, AIN2, BIN1, and BIN2 pins are all low for time tSLEEP, the DRV8411A device enters a low-power sleep mode.

In sleep mode, the H-bridge, charge pump, internal regulator, and internal logic are disabled and the device draws minimal current from the supply pin (IVMQ). The device relies on a weak pulldown to ensure all of the internal MOSFETs remain disabled. If the device is powered up while all inputs are low, it immediately enters sleep mode. After any of the input pins are high for longer than the duration of tWAKE, the device becomes fully operational.

The following timing diagram shows an example of entering and leaving sleep mode.

GUID-20211027-SS0I-H7RM-7CRV-WW61P1XR6NKL-low.svgFigure 9-8 Sleep Mode Entry and Wakeup Timing Diagram