SLVSGI9B October 2022 – July 2024 DRV8411A
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
After the supply voltage on the VM pin has crossed the undervoltage threshold VUVLO, any of the the xINx pins are in a state other than AIN1 = AIN2 = BIN1 = BIN2 = 0, and tWAKE has elapsed, the device enters active mode. In this mode, the H-bridge, charge pump, and internal logic are active and the device is ready to receive inputs.