The LM5066Hx provides current limit protection with eight programmable thresholds ranging from 10 mV to 50 mV. Current limiting activates when the voltage across the sense resistor R_SNS (between VIN_K and SENSE pins) exceeds the selected threshold. Two thresholds can be set directly using the CL pin, 25 mV when CL is connected to VDD and 50 mV when CL is connected to GND. The remaining six thresholds are available by programming the DEVICE_SETUP1 and DEVICE_SETUP2 registers through the PMBus interface.

During an over current event, the device offers two protection modes: over current blanking and current limiting. These modes can operate independently or sequentially based on configuration.

In over current blanking mode, the device allows the load current to flow without limiting it for a set time period, as long as it remains below the circuit breaker threshold (V_CB). The LM5066Hx features two over current blanking thresholds with separate timers:

• V_CBL1 with timer t_CBL1 for moderate over currents

• V_CBL2 with timer t_CBL2 for higher over currents

These thresholds and timers are configured in the DEVICE_SETUP3 and OC_BLANKING_TIMERS registers. Typically, V_CBL1 is set higher than V_CL, and V_CBL2 is set higher than V_CBL1. For load currents between V_CL and V_CBL2, the t_CBL1 timer activates. For load currents between V_CBL1 and V_CBL2, the t_CBL2 timer activates.

The timer resets if the current drops below the respective threshold before it expires. If either timer expires due to prolonged overload, the device transitions to current limiting mode. In the LM5066H2, GATE2 turns off immediately when either timer expires. Over current blanking mode can be disabled by setting t_CBL1 and t_CBL2 to 0 μs.

In current limiting mode, the GATE voltage is regulated such that the current through MOSFET driven by GATE1 is limited to the set current limit threshold. The fault timer activates during current limiting. If the load current falls below the current limit threshold before the fault timer expires, normal operation resumes. If the current limit persists beyond the fault timeout period set by C_TMR, GATE1 turns off. Current limiting can be disabled by setting bit 7 in DEVICE_SETUP3. When disabled, both GATE1 and GATE2 turn off after the blanking phase when either of the blanking timer expires. When a current limit fault occurs, the device sets fault flags in the STATUS_INPUT (7Ch), STATUS_WORD (79h), and DIAGNOSTIC_WORD (E1h) registers, and asserts the SMBA pin. SMBA signaling can be disabled using the ALERT_MASK (D8h) register.For reliable operation, the R_SNS resistor value should not exceed 200 mΩ to avoid instability in the current limit control loop.

Figure 7-1 Current Limit, Blanking and Circuit Breaker Thresholds