SNVSBJ0B December 2019 – August 2021 LM5170
PRODUCTION DATA
The UVLO pin is the master enable pin of the LM5170. It can be directly controlled by an external control unit like an MCU.
Nevertheless, the UVLO pin can also fulfill the undervoltage lockout function of a particular power rail. The rail can be either the HV-Port, the LV-Port, or VCC. Use a resistor divider to set the UVLO threshold, as shown in Figure 8-28. The divider must satisfy Equation 21:
The UVLO hysteresis is accomplished with an internal 25-μA current source. When UVLO > 2.5 V, the current source is activated to instantly raise the voltage at the UVLO pin. When the UVLO pin voltage falls below the 2.5-V threshold the current source is turned off, causing the voltage at the UVLO pin to fall. The UVLO hysteresis is determined by Equation 22:
An optional ceramic capacitor CUVLO can be placed in parallel with RUVLO2 to improve the noise immunity. CUVLO is usually between 1 nF to 10 nF. Large CUVLO can cause excessive delay to respond to a real UVLO event.
If Equation 22 does not provide adequate hysteresis voltage, you can add RUVLO3 as shown in Figure 8-29. The hysteresis voltage is thus given by Equation 23: