SNAS635E December   2013  – January 2022 LMK00334

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements, Propagation Delay, and Output Skew
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Differential Voltage Measurement Terminology
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Crystal Power Dissipation vs. RLIM
      2. 8.3.2 Clock Inputs
      3. 8.3.3 Clock Outputs
        1. 8.3.3.1 Reference Output
    4. 8.4 Device Functional Modes
      1. 8.4.1 VCC and VCCO Power Supplies
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Driving the Clock Inputs
        2. 9.2.1.2 Crystal Interface
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Termination and Use of Clock Drivers
        2. 9.2.2.2 Termination for DC-Coupled Differential Operation
        3. 9.2.2.3 Termination for AC-Coupled Differential Operation
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 Current Consumption and Power Dissipation Calculations
      1. 10.1.1 Power Dissipation Example: Worst-Case Dissipation
    2. 10.2 Power Supply Bypassing
      1. 10.2.1 Power Supply Ripple Rejection
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Management
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.1.1 Power Dissipation Example: Worst-Case Dissipation

This example shows how to calculate IC power dissipation for a configuration to estimate worst-case power dissipation. In this case, the maximum supply voltage and supply current values specified in Section 6.5 are used:

  • Max VCC = VCCO = 3.465 V. Max ICC and ICCO values.
  • CLKin0/CLKin0* input is selected.
  • Banks A and B are enabled, and all outputs are terminated with 50 Ω to GND.
  • REFout is enabled with 5-pF load.
  • TA =85°C

Using the power calculations from the previous section and maximum supply current specifications, the user can compute PTOTAL and PDEVICE.

  • From Equation 5: ICC_TOTAL = 10.5 mA + 58.5 mA + 5.5 mA = 74.5 mA
  • From ICCO_HCSL max spec: ICCO_BANK = 50% of ICCO_HCSL = 40.75 mA
  • From Equation 7: PTOTAL = (3.465 V × 74.5 mA) + (3.465 V × 40.75 mA) + (3.465 V × 40.75 mA) + (3.465 V × 10 mA) = 575.2 mW
  • From Equation 8: PRT_HCSL = (0.92 V)2 / 50 Ω = 16.9 mW (per output pair)
  • From Equation 9: PDEVICE = 575.2 mW – (4 × 16.9 mW) = 510.4 mW

In this worst-case example, the IC device will dissipate about 510.4 mW or 88.7% of the total power (575.2 mW), while the remaining 11.3% will be dissipated in the termination resistors (64.8 mW for 4 pairs). Based on RθJA of 38.1°C/W, the estimate die junction temperature would be about 19.4°C above ambient, or 104.4°C when TA = 85°C.