SNAS635F December   2013  – August 2025 LMK00334

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements, Propagation Delay, and Output Skew
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Differential Voltage Measurement Terminology
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Crystal Power Dissipation vs RLIM
      2. 7.3.2 Clock Inputs
      3. 7.3.3 Clock Outputs
        1. 7.3.3.1 Reference Output
    4. 7.4 Device Functional Modes
      1. 7.4.1 VCC and VCCO Power Supplies
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Driving the Clock Inputs
        2. 8.2.1.2 Crystal Interface
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Termination and Use of Clock Drivers
        2. 8.2.2.2 Termination for DC-Coupled Differential Operation
        3. 8.2.2.3 Termination for AC-Coupled Differential Operation
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Current Consumption and Power Dissipation Calculations
        1. 8.3.1.1 Power Dissipation Example: Worst-Case Dissipation
      2. 8.3.2 Power Supply Bypassing
        1. 8.3.2.1 Power Supply Ripple Rejection
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
      3. 8.4.3 Thermal Management
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.1.1 Power Dissipation Example: Worst-Case Dissipation

This example shows how to calculate IC power dissipation for a configuration to estimate worst-case power dissipation. In this case, the maximum supply voltage and supply current values specified in Electrical Characteristics are used:

  • Max VCC = VCCO = 3.465V. Maximum ICC and ICCO values.
  • CLKin0/CLKin0* input is selected.
  • Banks A and B are enabled, and all outputs are terminated with 50Ω to GND.
  • REFout is enabled with 5pF load.
  • TA =85°C

Using the power calculations from the previous section and maximum supply current specifications, the user can compute PTOTAL and PDEVICE.

  • From Equation 5: ICC_TOTAL = 10.5mA + 58.5mA + 5.5mA = 74.5mA
  • From ICCO_HCSL maximum specification: ICCO_BANK = 50% of ICCO_HCSL = 40.75mA
  • From Equation 7: PTOTAL = (3.465V × 74.5mA) + (3.465V × 40.75mA) + (3.465V × 40.75mA) + (3.465V × 10mA) = 575.2mW
  • From Equation 8: PRT_HCSL = (0.92V)2 / 50Ω = 16.9mW (per output pair)
  • From Equation 9: PDEVICE = 575.2mW – (4 × 16.9mW) = 510.4mW

In this worst-case example, the IC device dissipates about 510.4mW or 88.7% of the total power (575.2mW), while the remaining 11.3% is dissipated in the termination resistors (64.8mW for 4 pairs). Based on RθJA of 38.1°C/W, the estimate die junction temperature is approximately 19.4°C above ambient, or 104.4°C when TA = 85°C.