SNAS635F December   2013  – August 2025 LMK00334

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements, Propagation Delay, and Output Skew
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Differential Voltage Measurement Terminology
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Crystal Power Dissipation vs RLIM
      2. 7.3.2 Clock Inputs
      3. 7.3.3 Clock Outputs
        1. 7.3.3.1 Reference Output
    4. 7.4 Device Functional Modes
      1. 7.4.1 VCC and VCCO Power Supplies
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Driving the Clock Inputs
        2. 8.2.1.2 Crystal Interface
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Termination and Use of Clock Drivers
        2. 8.2.2.2 Termination for DC-Coupled Differential Operation
        3. 8.2.2.3 Termination for AC-Coupled Differential Operation
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Current Consumption and Power Dissipation Calculations
        1. 8.3.1.1 Power Dissipation Example: Worst-Case Dissipation
      2. 8.3.2 Power Supply Bypassing
        1. 8.3.2.1 Power Supply Ripple Rejection
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
      3. 8.4.3 Thermal Management
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.7 Typical Characteristics

Unless otherwise specified: VCC = 3.3V, VCCO = 3.3V, TA = 25°C, CLKin driven differentially, input slew rate ≥ 3V/ns.

LMK00334 HCSL Output Swing at 250MHz
Figure 5-1 HCSL Output Swing at 250MHz
LMK00334 Noise Floor vs CLKin Slew Rate at 100MHz
Fclk = 100MHz Foffset = 20MHz
Figure 5-3 Noise Floor vs CLKin Slew Rate at 100MHz
LMK00334 RMS Jitter vs CLKin Slew Rate at 100MHz
Fclk = 100MHz Int. BW = 1 to 20MHz
Figure 5-5 RMS Jitter vs CLKin Slew Rate at 100MHz
LMK00334 PSRR vs Ripple Frequency at 156.25MHz
Fclk = 156.25MHz Vccco Ripple = 100mVpp
Figure 5-7 PSRR vs Ripple Frequency at 156.25MHz
LMK00334 Propagation Delay vs Temperature
Figure 5-9 Propagation Delay vs Temperature
LMK00334 HCSL Phase Noise at 100MHzFigure 5-11 HCSL Phase Noise at 100MHz
LMK00334 LVCMOS Output Swing at 250MHz
Figure 5-2 LVCMOS Output Swing at 250MHz
LMK00334 Noise Floor vs CLKin Slew Rate at 156.25MHz
Fclk = 156.25MHz Foffset = 20MHz
Figure 5-4 Noise Floor vs CLKin Slew Rate at 156.25MHz
LMK00334 RMS Jitter vs CLKin Slew Rate at 156.25MHz
Fclk = 156.25MHz Int. BW = 1 to 20MHz
Figure 5-6 RMS Jitter vs CLKin Slew Rate at 156.25MHz
LMK00334 PSRR vs Ripple Frequency at 312.5MHz
Fclk = 312.5MHz Vccco Ripple = 100mVpp
Figure 5-8 PSRR vs Ripple Frequency at 312.5MHz
LMK00334 Crystal Power Dissipation vs RLIM
Figure 5-10 Crystal Power Dissipation vs RLIM